1. 16 Feb, 2021 3 commits
    • Pali Rohár's avatar
      marvell: uart: a3720: Increase TX FIFO EMPTY timeout from 2ms to 3ms · 0d06b058
      Pali Rohár authored
      
      
      TX FIFO has space for 32 characters. With default UART baudrate 115200 it
      takes more than 2ms to transmit all 32 characters, so wait at least 3ms
      before flushing TX FIFO.
      
      If WTMI firmware transmitted something via UART before TF-A was booted,
      some characters may still wait in TX FIFO when TF-A is initializing UART
      driver. So wait at least 3ms to ensure that HW has enough time to transmit
      all characters waiting in TX FIFO.
      
      This fixes an issue where sometimes characters transmitted on UART by our
      custom WTMI image are lost.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I8ea4ea58e4ba3e0c0d7f47e679171b9b94442f19
      0d06b058
    • Pali Rohár's avatar
      marvell: uart: a3720: Update delay code to be compatible with 1200 MHz CPU · 98641515
      Pali Rohár authored
      
      
      Console initialization function needs to wait at least minimal specified
      time. The fastest Armada 3720 CPU is 1200 MHz so increase loop delay to
      wait at least for 100 us on 1200 MHz variant too. The slowest Armada 3720
      CPU is 600 MHz and in this case delay loop would take just 2 times more,
      which is not a problem.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I1f0b4aabd0e08b7696feec631419f7f7c7ec17d2
      98641515
    • Pali Rohár's avatar
      marvell: uart: a3720: Fix comments in console_a3700_core_init() function · ab1fe188
      Pali Rohár authored
      
      
      The delay loop executes 3 instructions. These 3 instructions are executed
      in 2 processor ticks and 30000 iterations on a 600 MHz CPU should yield
      approximately 100 us. This means we are waiting 2 ms, not 20 ms, for TX
      FIFO to be empty.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I2cccad405bcc73cd6d1062adc0205c405c16c15f
      ab1fe188
  2. 18 Jan, 2021 2 commits
    • Pali Rohár's avatar
      marvell: uart: a3720: Fix macro name for 6th bit of Status Register · b8e637f4
      Pali Rohár authored
      
      
      This patch does not change code, it only updates comments and macro name
      for 6th bit of Status Register. So TF-A binary stay same.
      
      6th bit of the Status Register is named TX EMPTY and is set to 1 when both
      Transmitter Holding Register (THR) or Transmitter Shift Register (TSR) are
      empty. It is when all characters were already transmitted.
      
      There is also TX FIFO EMPTY bit in the Status Register which is set to 1
      only when THR is empty.
      
      In both console_a3700_core_init() and console_a3700_core_flush() functions
      we should wait until both THR and TSR are empty therefore we should check
      6th bit of the Status Register.
      
      So current code is correct, just had misleading macro names and comments.
      This change fixes this "documentation" issue, fixes macro name for 6th bit
      of the Status Register and also updates comments.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I19e4e7f53a90bcfb318e6dd1b1249b6cbf81c4d3
      b8e637f4
    • Pali Rohár's avatar
      marvell: uart: a3720: Implement console_a3700_core_getc · 74867756
      Pali Rohár authored
      
      
      Implementation is simple, just check if there is a pending character in
      RX FIFO via RXRDY bit of Status Register and if yes, read it from
      UART_RX_REG register.
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I226b6e336f44f5d0ca8dcb68e49a68e8f2f49708
      74867756
  3. 23 Dec, 2020 1 commit
    • Pali Rohár's avatar
      marvell: uart: a3720: Implement console_a3700_core_flush · e63e4140
      Pali Rohár authored
      
      
      Implementation is simple, just wait for the TX FIFO to be empty.
      
      Without this patch TF-A on A3720 truncate the last line:
      
        NOTICE:  BL31: Built : 16:1
      
      With this patch TF-A on A3720 print correctly also the last line:
      
        NOTICE:  BL31: Built : 19:03:31, Dec 23 2020
      Signed-off-by: default avatarPali Rohár <pali@kernel.org>
      Change-Id: I2f2ea42beab66ba132afdb400ca7898c5419db09
      e63e4140
  4. 09 Oct, 2020 1 commit
    • Jimmy Brisson's avatar
      Don't return error information from console_flush · 831b0e98
      Jimmy Brisson authored
      
      
      And from crash_console_flush.
      
      We ignore the error information return by console_flush in _every_
      place where we call it, and casting the return type to void does not
      work around the MISRA violation that this causes. Instead, we collect
      the error information from the driver (to avoid changing that API), and
      don't return it to the caller.
      
      Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1
      Signed-off-by: default avatarJimmy Brisson <jimmy.brisson@arm.com>
      831b0e98
  5. 25 Feb, 2020 1 commit
  6. 03 Apr, 2019 1 commit
  7. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  8. 15 Nov, 2018 1 commit
  9. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  10. 22 Oct, 2018 1 commit