- 09 Jun, 2020 1 commit
-
-
Andre Przywara authored
The only difference between GIC-500 and GIC-600 relevant to TF-A is the differing power management sequence. A certain GIC implementation is detectable at runtime, for instance by checking the IIDR register. Let's add that test before initiating the GIC-600 specific sequence, so the code can be used on both GIC-600 and GIC-500 chips alike, without deciding on a GIC chip at compile time. This means that the GIC-500 "driver" is now redundant. To allow minimal platform support, add a switch to disable GIC-600 support. Change-Id: I17ea97d9fb05874772ebaa13e6678b4ba3415557 Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
-
- 27 May, 2020 1 commit
-
-
Usama Arif authored
This patch adds support for Total Compute (TC0) platform. It is an initial port and additional features are expected to be added later. TC0 has a SCP which brings the primary Cortex-A out of reset which starts executing BL1. TF-A optionally authenticates the SCP ram-fw available in FIP and makes it available for SCP to copy. Some of the major features included and tested in this platform port include TBBR, PSCI, MHUv2 and DVFS. Change-Id: I1675e9d200ca7687c215009eef483d9b3ee764ef Signed-off-by:
Usama Arif <usama.arif@arm.com>
-