1. 24 Mar, 2021 14 commits
  2. 19 Mar, 2021 1 commit
  3. 16 Mar, 2021 1 commit
  4. 15 Mar, 2021 1 commit
    • Olivier Deprez's avatar
      SPM: declare third cactus instance as UP SP · e96fc8e7
      Olivier Deprez authored
      
      
      The FF-A v1.0 spec allows two configurations for the number of EC/vCPU
      instantiated in a Secure Partition:
      -A MultiProcessor (MP) SP instantiates as many ECs as the number of PEs.
      An EC is pinned to a corresponding physical CPU.
      -An UniProcessor (UP) SP instantiates a single EC. The EC is migrated to
      the physical CPU from which the FF-A call is originating.
      This change permits exercising the latter case within the TF-A-tests
      framework.
      Signed-off-by: default avatarOlivier Deprez <olivier.deprez@arm.com>
      Change-Id: I7fae0e7b873f349b34e57de5cea496210123aea0
      e96fc8e7
  5. 10 Mar, 2021 1 commit
  6. 09 Mar, 2021 1 commit
  7. 08 Mar, 2021 1 commit
  8. 03 Mar, 2021 6 commits
  9. 02 Mar, 2021 1 commit
  10. 01 Mar, 2021 3 commits
  11. 25 Feb, 2021 2 commits
  12. 24 Feb, 2021 2 commits
  13. 17 Feb, 2021 1 commit
  14. 16 Feb, 2021 1 commit
  15. 15 Feb, 2021 1 commit
    • Andre Przywara's avatar
      plat/arm: juno: Condition Juno entropy source with CRC instructions · eb18ce32
      Andre Przywara authored
      
      
      The Juno Trusted Entropy Source has a bias, which makes the generated
      raw numbers fail a FIPS 140-2 statistic test.
      
      To improve the quality of the numbers, we can use the CPU's CRC
      instructions, which do a decent job on conditioning the bits.
      
      This adds a *very* simple version of arm_acle.h, which is typically
      provided by the compiler, and contains the CRC instrinsics definitions
      we need. We need the original version by using -nostdinc.
      
      Change-Id: I83d3e6902d6a1164aacd5060ac13a38f0057bd1a
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      eb18ce32
  16. 12 Feb, 2021 1 commit
    • Pankaj Gupta's avatar
      nxp: added the makefile helper macros · b749ae3d
      Pankaj Gupta authored
      
      
      NXP specifc macro SET_NXP_MAKE_FLAG is added.
      
      NXP has pool of multiple IPs. This macro helps:
      - In soc.mk, this macro help the selected IP source files to be included
        for that SoC.
        -- The set of IPs required for one NXP SoC is different to the set of IPs
           required by another NXP SoC.
      
      - For the same SoC,
        -- For one feature, the IP may be required in both BL2 and BL31.
        -- Without the above feature, that IP may be required in one.
           This macro help in selecting the inclusion of source and header files to:
           --- BL2 only
           --- BL31 only
           --- COMM (used by BL2 and BL31)
      Signed-off-by: default avatarPankaj Gupta <pankaj.gupta@nxp.com>
      Change-Id: I2cdb13b89aa815fc5219cf8bfb9666d0a9f78765
      b749ae3d
  17. 11 Feb, 2021 2 commits
    • Andre Przywara's avatar
      plat/arm: juno: Refactor juno_getentropy() · 543f0d8b
      Andre Przywara authored
      
      
      Currently we use the Juno's TRNG hardware entropy source to initialise
      the stack canary. The current function allows to fill a buffer of any
      size, but we will actually only ever request 16 bytes, as this is what
      the hardware implements. Out of this, we only need at most 64 bits for
      the canary.
      
      In preparation for the introduction of the SMCCC TRNG interface, we
      can simplify this Juno specific interface by making it compatible with
      the generic one: We just deliver 64 bits of entropy on each call.
      This reduces the complexity of the code. As the raw entropy register
      readouts seem to be biased, it makes sense to do some conditioning
      inside the juno_getentropy() function already.
      Also initialise the TRNG hardware, if not already done.
      
      Change-Id: I11b977ddc5417d52ac38709a9a7b61499eee481f
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      543f0d8b
    • Konstantin Porotchkin's avatar
      plat/marvell: fix SPD handling in dram port · 1e179c79
      Konstantin Porotchkin authored
      
      
      The DRAM port code issues a dummy write to SPD page-0 i2c address
      in order to select this page for the forthcoming read transaction.
      If the write buffer length supplied to i2c_write is not zero, this
      call is translated to 2 bus transations:
      
      - set the target offset
      - write the data to the target
      
      However no actual data should be transferred to SPD page-0 in order
      to select it. Actually, the second transation never receives an ACK
      from the target device, which caused the following error report:
      
      ERROR:   Status 30 in write transaction
      
      This patch sets the buffer length in page-0 select writes to zero,
      leading to bypass the data transfer to the target device.
      Issuing the target offset command to SPD page-0 address effectively
      selects this page for the read operation.
      
      Change-Id: I4bf8e8c09da115ee875f934bc8fbc9349b995017
      Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
      Reviewed-on: https://sj1git1.cavium.com/24387
      
      Tested-by: default avatarsa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
      Reviewed-by: default avatarOfer Heifetz <oferh@marvell.com>
      Reviewed-by: default avatarMoti Buskila <motib@marvell.com>
      1e179c79