- 19 May, 2017 1 commit
-
-
David Cunado authored
This Linaro release updates just the binaries: Linaro binaries upgraded 16.12 --> 17.01 The toolchain remains at 5.3-2015.05 (gcc 5.3) for both AArch64 and AArch32. The ARM TF codebase has been tested against these new binaries. This patch updates the User Guide to reflect that the 17.01 release is now a supported Linaro Release. Change-Id: I83c579dabd3fa9861ba0d41507036efbd87abcb5 Signed-off-by: David Cunado <david.cunado@arm.com>
-
- 16 May, 2017 5 commits
-
-
danh-arm authored
Juno: Fix AArch32 sp_min build
-
Soby Mathew authored
The commit abd2aba9 introduced a regression to the AArch32 sp_min Juno build. This patch fixes that. Change-Id: I4b141717684d6aee60c761ea17f23170aa6708c3 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
-
danh-arm authored
rockchip: rk3328: Add assert check in pmu.c
-
danh-arm authored
mbedtls: Namespace update for TF specific macros
-
danh-arm authored
Break circular dependency in FVP and Nvidia header files
-
- 15 May, 2017 1 commit
-
-
tony.xie authored
Add assert() check for cpuson_flags[] and cpuson_entry_point[]. Change-Id: I971fe54c2baa3b4514a3979042341220f5e20901 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
-
- 12 May, 2017 6 commits
-
-
davidcunado-arm authored
Minor fixes to the xlat tables lib v2
-
David Cunado authored
A previous patch superseded the MBEDTLS_KEY_ALG. This patch updates the ARM platforms to use the new TF_MBEDTLS_KEY_ALG define. Change-Id: Ie0e1bc272e127e879ac58e7cfcbe268751d7688e Signed-off-by: David Cunado <david.cunado@arm.com>
-
David Cunado authored
This patch renames MBEDTLS_KEY_ALG to TF_MBEDTLS_KEY_ALG. This completes the migration of TF specific macros so that they do not have the MBEDTLS_ suffix (see arm-trusted-firmware#874). Change-Id: Iad7632477e220b0af987c4db3cf52229fb127d00 Signed-off-by: David Cunado <david.cunado@arm.com>
-
David Cunado authored
An earlier patch (arm-trusted-firmware#874) migrated MBEDTLS_ suffixed macros to have a TBBR_ suffix to avoid any potential clash with future mbedtls macros. But on reflection the TBBR_ suffix could be confusing as the macros are used to drive TF-specific configuration of mbedtls. As such this patch migrates these macros from TBBR_suffix to TF_MBEDTLS_ suffix which more accurately conveys their use. Change-Id: Ic87642b653ceeaa03d62f724976abd5e12e867d4 Signed-off-by: David Cunado <david.cunado@arm.com>
-
Sandrine Bailleux authored
For SoCs T132 and T210, the header file 'platform_def.h' used to include 'tegra_def.h' and vice versa. This patch breaks this circular dependency by making 'tegra_def.h' independent. Change-Id: I45a00a84e6ab8b93d5e9242a9ff65f03e9102a96 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
-
Sandrine Bailleux authored
We used to have the following circular dependency in the FVP platform header files: +-> arm_def.h ---> platform_def.h ---> fvp_def.h --+ |__________________________________________________| This patch breaks it by not including 'arm_def.h' from 'fvp_def.h'. Change-Id: I280d906559e3343dd38764029e77c0ea768b4fec Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
-
- 11 May, 2017 5 commits
-
-
davidcunado-arm authored
Add missing SPDX header
-
David Cunado authored
A new file added as part of arm-trusted-firmware#927 was missing the SPDX license identifier - this patch adds the missing identifier. Change-Id: Id1355f2bdca930b7e65bb54eff7e6c764ebb0d96 Signed-off-by: David Cunado <david.cunado@arm.com>
-
davidcunado-arm authored
Update AEM and Cortex Models versions
-
davidcunado-arm authored
Execution state switch
-
davidcunado-arm authored
Use SPDX license identifiers for remaining files
-
- 10 May, 2017 5 commits
-
-
dp-arm authored
Change-Id: I7f54f45db65f32481cc05e1bd2c9c683b756e19a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
-
davidcunado-arm authored
rockchip: rk3328: support rk3328
-
davidcunado-arm authored
Revert "rockchip: Remove unused rockchip_pd_pwr_down_wfi function"
-
Antonio Nino Diaz authored
This reverts commit b6dcbf58 . This function wasn't used when it was removed, but it is needed to compile the new changes proposed for Rockchip platforms. Change-Id: Ia5bfe1f8398e08431f96923e2f059a83e5cb78d4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
tony.xie authored
Change-Id: I78c7e304d3070f66e2ca3bf838c76ee6a2ae3430 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
-
- 09 May, 2017 1 commit
-
-
Antonio Nino Diaz authored
- Fix some comments. - Remove duplicated definition. - Make xlat_arch_get_max_supported_pa() private in aarch64. Change-Id: I629237209cfb2ce7b0c4bd539d63dd81d45b2edd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
- 08 May, 2017 2 commits
-
-
davidcunado-arm authored
Minor makefile fixes
-
davidcunado-arm authored
Migrate secure payload dispatchers to new SMC terminology
-
- 05 May, 2017 2 commits
-
-
David Cunado authored
AEMv8-A Model release v8.4 has been made available and Trusted Firmware has been tested against these versions as part of its CI system. This patch updates the user guide documentation to reflect the version of AEM and Cortex Models that Trusted Firmware has been tested against. Additionally, ARM FVPs FVP_Base_Cortex-A57x1-A53x1 and FVP_Base_Cortex-A57x2-A53x4 are removed from the list of tested FVPs as they are currently not being tested with the latest version of ARM Trusted Firmware. Also, documentation and links to Linaro pages have been updated to reflect the changes in the ARM community document hosting. Change-Id: Idae97303ce0929c82b137017de84ce94678f6f2b Signed-off-by: David Cunado <david.cunado@arm.com>
-
davidcunado-arm authored
Fix execute-never permissions in xlat tables libs
-
- 04 May, 2017 3 commits
-
-
David Cunado authored
Since Issue B (November 2016) of the SMC Calling Convention document standard SMC calls are renamed to yielding SMC calls to help avoid confusion with the standard service SMC range, which remains unchanged. http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pd A previous patch introduced a new define for yielding SMC call type. This patch updates the secure payload dispatchers (except the TSPD) to use this new define and also migrates the code to use the new terminology. Change-Id: I3d2437c04e3b21fdbd32019f55c066c87679a5bf Signed-off-by: David Cunado <david.cunado@arm.com>
-
davidcunado-arm authored
Use SPDX license identifiers
-
Jeenu Viswambharan authored
In AArch64, privileged exception levels control the execution state (a.k.a. register width) of the immediate lower Exception Level; i.e. whether the lower exception level executes in AArch64 or AArch32 state. For an exception level to have its execution state changed at run time, it must request the change by raising a synchronous exception to the higher exception level. This patch implements and adds such a provision to the ARM SiP service, by which an immediate lower exception level can request to switch its execution state. The execution state is switched if the request is: - raised from non-secure world; - raised on the primary CPU, before any secondaries are brought online with CPU_ON PSCI call; - raised from an exception level immediately below EL3: EL2, if implemented; otherwise NS EL1. If successful, the SMC doesn't return to the caller, but to the entry point supplied with the call. Otherwise, the caller will observe the SMC returning with STATE_SW_E_DENIED code. If ARM Trusted Firmware is built for AArch32, the feature is not supported, and the call will always fail. For the ARM SiP service: - Add SMC function IDs for both AArch32 and AArch64; - Increment the SiP service minor version to 2; - Adjust the number of supported SiP service calls. Add documentation for ARM SiP service. Fixes ARM-software/tf-issues#436 Change-Id: I4347f2d6232e69fbfbe333b340fcd0caed0a4cea Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
-
- 03 May, 2017 1 commit
-
-
dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
-
- 02 May, 2017 8 commits
-
-
Evan Lloyd authored
Some recent changes have added direct use of the echo command without parameters. This fails on a Windows shell, because echo without parameters reports the mode ("ECHO is on"). This is corrected using the ECHO_BLANK_LINE macro already provided for that purpose. Change-Id: I5fd7192861b4496f6f46b4f096e80a752cd135d6 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
-
Evan Lloyd authored
2 problems were found, but are in one change to avoid submitting a patch that might fail to build. The problems were: 1. The macro MAKE_PREREQ_DIR has a minor bug, in that it is capable of generating recursive dependencies. 2. The inclusion of BUILD_DIR in TEMP_OBJ_DIRS left no explicit dependency, BUILD_DIR might not exist when subdirectories are created by a thread on another CPU. This fix corrects these with the following changes: 1. MAKE_PREREQ_DIR does nothing for a direct self dependency. 2. BUILD_DIR is built using MAKE_PREREQ_DIR. 3. BUILD_DIR is an explicit prerequisite of all OBJ_DIRS. Change-Id: I938cddea4a006df225c02a47b9cf759212f27fb7 Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
-
davidcunado-arm authored
Update terminology: standard SMC to yielding SMC
-
Jeenu Viswambharan authored
Replace all instances of checks with the new macro. Change-Id: I0eec39b9376475a1a9707a3115de9d36f88f8a2a Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
-
Antonio Nino Diaz authored
Translation regimes that only support one virtual address space (such as the ones for EL2 and EL3) can flag memory regions as execute-never by setting to 1 the XN bit in the Upper Attributes field in the translation tables descriptors. Translation regimes that support two different virtual address spaces (such as the one shared by EL1 and EL0) use bits PXN and UXN instead. The Trusted Firmware runs at EL3 and EL1, it has to handle translation tables of both translation regimes, but the previous code handled both regimes the same way, as if both had only 1 VA range. When trying to set a descriptor as execute-never it would set the XN bit correctly in EL3, but it would set the XN bit in EL1 as well. XN is at the same bit position as UXN, which means that EL0 was being prevented from executing code at this region, not EL1 as the code intended. Therefore, the PXN bit was unset to 0 all the time. The result is that, in AArch64 mode, read-only data sections of BL2 weren't protected from being executed. This patch adds support of translation regimes with two virtual address spaces to both versions of the translation tables library, fixing the execute-never permissions for translation tables in EL1. The library currently does not support initializing translation tables for EL0 software, therefore it does not set/unset the UXN bit. If EL1 software needs to initialize translation tables for EL0 software, it should use a different library instead. Change-Id: If27588f9820ff42988851d90dc92801c8ecbe0c9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-
davidcunado-arm authored
xlat lib: Don't set mmap_attr_t enum to be -1
-
Nishanth Menon authored
-1 is not a defined mmap_attr_t type. Instead of using invalid enum types, we can either choose to define a INVALID type OR handle the condition specifically. Since the usage of mmap_region_attr is limited, it is easier to just handle the error condition specifically and return 0 or -1 depending on success or fail. Fixes: ARM-Software/tf-issues#473 Fixes: 28fa2e9e ("xlat lib: Use mmap_attr_t type consistently") Signed-off-by: Nishanth Menon <nm@ti.com>
-
davidcunado-arm authored
Move defines in utils.h to utils_def.h to fix shared header compile i…
-