1. 23 May, 2014 1 commit
    • Soby Mathew's avatar
      Non-Secure Interrupt support during Standard SMC processing in TSP · 239b04fa
      Soby Mathew authored
      Implements support for Non Secure Interrupts preempting the
      Standard SMC call in EL1. Whenever an IRQ is trapped in the
      Secure world we securely handover to the Normal world
      to process the interrupt. The normal world then issues
      "resume" smc call to resume the previous interrupted SMC call.
      Fixes ARM-software/tf-issues#105
      
      Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
      239b04fa
  2. 22 May, 2014 1 commit
    • Achin Gupta's avatar
      Add support for asynchronous FIQ handling in TSP · 57356e90
      Achin Gupta authored
      This patch adds support in the TSP to handle FIQ interrupts that are
      generated when execution is in the TSP. S-EL1 interrupt are handled
      normally and execution resumes at the instruction where the exception
      was originally taken. S-EL3 interrupts i.e. any interrupt not
      recognized by the TSP are handed to the TSPD. Execution resumes
      normally once such an interrupt has been handled at EL3.
      
      Change-Id: Ia3ada9a4fb15670afcc12538a6456f21efe58a8f
      57356e90