1. 13 Mar, 2019 1 commit
    • Bryan O'Donoghue's avatar
      bl2-el3: Fix exit to bl32 by ensuring a more complete write to SPSR · eb20f04e
      Bryan O'Donoghue authored
      Prior to entry into BL32 we set the SPSR by way of msr spsr, r1.
      This unfortunately only writes the bits f->[31:24] and c->[7:0].
      
      This patch updates the bl2 exit path to write the x->[15:8] and c->[7:0]
      fields of the SPSR. For the purposes of initial setup of the SPSR the x and
      c fields should be sufficient and importantly will capture the necessary
      lower-order control bits that f:c alone do not.
      
      This is important to do to ensure the SPSR is set to the mode the platform
      intends prior to performing an eret.
      
      Fixes: b1d27b48
      
       ("bl2-el3: Add BL2_EL3 image")
      Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
      eb20f04e
  2. 27 Feb, 2019 1 commit
    • Antonio Nino Diaz's avatar
      BL2_AT_EL3: Enable pointer authentication support · dcbfa11b
      Antonio Nino Diaz authored
      
      
      The size increase after enabling options related to ARMv8.3-PAuth is:
      
      +----------------------------+-------+-------+-------+--------+
      |                            |  text |  bss  |  data | rodata |
      +----------------------------+-------+-------+-------+--------+
      | CTX_INCLUDE_PAUTH_REGS = 1 |   +44 |   +0  |   +0  |   +0   |
      |                            |  0.2% |       |       |        |
      +----------------------------+-------+-------+-------+--------+
      | ENABLE_PAUTH = 1           |  +712 |   +0  |  +16  |   +0   |
      |                            |  3.1% |       |  0.9% |        |
      +----------------------------+-------+-------+-------+--------+
      
      The results are valid for the following build configuration:
      
          make PLAT=fvp SPD=tspd DEBUG=1 \
          BL2_AT_EL3=1                   \
          CTX_INCLUDE_PAUTH_REGS=1       \
          ENABLE_PAUTH=1
      
      Change-Id: I1c0616e7dea30962a92b4fd113428bc30a018320
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      dcbfa11b
  3. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  4. 05 Mar, 2018 1 commit
  5. 18 Jan, 2018 1 commit
    • Roberto Vargas's avatar
      bl2-el3: Add BL2_EL3 image · b1d27b48
      Roberto Vargas authored
      
      
      This patch enables BL2 to execute at the highest exception level
      without any dependancy on TF BL1. This enables platforms which already
      have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL
      stages without need for BL1.  This is not currently possible because
      BL2 executes at S-EL1 and cannot jump straight to EL3.
      
      Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      b1d27b48