1. 13 Jan, 2021 24 commits
  2. 12 Jan, 2021 8 commits
  3. 11 Jan, 2021 8 commits
    • Madhukar Pappireddy's avatar
    • Marek Behún's avatar
      plat: marvell: armada: a3k: improve 4GB DRAM usage from 3.375 GB to 3.75 GB · b04921f7
      Marek Behún authored
      
      
      The current configuration of CPU windows on Armada 37x0 with 4 GB DRAM
      can only utilize 3.375 GB of memory. This is because there are only 5
      configuration windows, configured as such (in hexadecimal, also showing
      ranges not configurable by CPU windows):
      
               0 - 80000000 |   2 GB | DDR  | CPU window 0
        80000000 - C0000000 |   1 GB | DDR  | CPU window 1
        C0000000 - D0000000 | 256 MB | DDR  | CPU window 2
        D0000000 - D2000000 |  32 MB |      | Internal regs
            empty space     |        |      |
        D8000000 - D8010000 |  64 KB |      | CCI regs
            empty space     |        |      |
        E0000000 - E8000000 | 128 MB | DDR  | CPU window 3
        E8000000 - F0000000 | 128 MB | PCIe | CPU window 4
            empty space     |        |      |
        FFF00000 - end      |  64 KB |      | Boot ROM
      
      This can be improved by taking into account that:
      - CCI window can be moved (the base address is only hardcoded in TF-A;
        U-Boot and Linux will not break with changing of this address)
      - PCIe window can be moved (upstream U-Boot can change device-tree
        ranges of PCIe if PCIe window is moved)
      
      Change the layout after the Internal regs as such:
      
        D2000000 - F2000000 | 512 MB | DDR  | CPU window 3
        F2000000 - FA000000 | 128 MB | PCIe | CPU window 4
            empty space     |        |      |
        FE000000 - FE010000 |  64 KB |      | CCI regs
            empty space     |        |      |
        FFF00000 - end      |  64 KB |      | Boot ROM
      
      (Note that CCI regs base address is moved from D8000000 to FE000000 in
       all cases, not only for the configuration with 4 GB of DRAM. This is
       because TF-A is built with this address as a constant, so we cannot
       change this address at runtime only on some boards.)
      
      This yields 3.75 GB of usable RAM.
      
      Moreover U-Boot can theoretically reconfigure the PCIe window to DDR if
      it discovers that no PCIe card is connected. This can add another 128 MB
      of DRAM (resulting only in 128 MB of DRAM not being used).
      Signed-off-by: default avatarMarek Behún <marek.behun@nic.cz>
      Change-Id: I4ca1999f852f90055fac8b2c4f7e80275a13ad7e
      b04921f7
    • Manish Pandey's avatar
      Merge changes I46cd4d9b,Iba009587,I41d146e8,Ic66ceab3,Iff46838a, ... into integration · e8a96e3e
      Manish Pandey authored
      * changes:
        drivers: renesas: rcar: io: Code cleanup
        drivers: renesas: rcar: pwrc: Code cleanup
        drivers: renesas: rcar: common: Code cleanup
        drivers: renesas: rcar: watchdog: Fix typo
        drivers: renesas: rcar: scif: Fix coding style
        drivers: renesas: rcar: iic_dvfs: Fix coding style
      e8a96e3e
    • Madhukar Pappireddy's avatar
    • Manish Pandey's avatar
      Merge changes I07c35829,Iec7dd019,Ic7406aa8,I4eac94f0 into integration · bc0d8c74
      Manish Pandey authored
      * changes:
        drivers: renesas: rcar: dma: Fix coding style
        drivers: renesas: rcar: delay: Fix checkpatch warnings
        drivers: renesas: rcar: avs: Fix checkpatch warnings
        drivers: renesas: rcar: auth: Use space instead of TAB
      bc0d8c74
    • Michal Simek's avatar
      cadence: Change logic in uart driver · 0b3d4273
      Michal Simek authored
      
      
      Write char if fifo is empty. If this is done like this all chars are
      printed. Because origin code just put that chars to fifo and in case of
      reset messages were missing.
      
      Before this change chars are put to fifo and only check before adding if
      fifo is full. The patch is changing this logic that it is adding char only
      when fifo is empty to make sure that in case of reset (by another SW for
      example) all chars are printed. Maybe one char can be missed but for IP
      itself it is much easier to send just one char compare to full fifo.
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Change-Id: Ic24c2c1252bce24be2aed68ee29477ca4a549e5f
      0b3d4273
    • Biju Das's avatar
      drivers: renesas: rcar: io: Code cleanup · eb52759a
      Biju Das authored
      
      
      This patch fixes checkpatch warnings and arrange header
      as per TF-A coding style.
      Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
      Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
      Change-Id: I46cd4d9b2851202324fe714e776cf3ad2ee1d923
      eb52759a
    • Biju Das's avatar
      drivers: renesas: rcar: dma: Fix coding style · 240c9cbf
      Biju Das authored
      
      
      Sort the headers alphabetically and replace TAB with a space
      after #define.
      Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
      Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
      Change-Id: I07c358294b7c02cbfa360112bbbde0eb5f2b50f5
      240c9cbf