- 12 Jul, 2017 1 commit
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Isla Mitchell authored
This fix modifies the order of system includes to meet the ARM TF coding standard. There are some exceptions in order to retain header groupings, minimise changes to imported headers, and where there are headers within the #if and #ifndef statements. Change-Id: I65085a142ba6a83792b26efb47df1329153f1624 Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>
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- 28 Jun, 2017 2 commits
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Soby Mathew authored
This patch implements the basic lifecycle state check when CryptoCell SBROM is initialized. Currently the check ensures that if the lifecycle state is Security Disabled (SD), the boot process does not proceed further. Change-Id: I5101335453cd3ea413e97bcfb9138a96c05e1aea Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch adds a crypto driver which utilizes the ARM® TrustZone® CryptoCell-712 to verify signature and hash during Trusted Board Boot. Along with this driver, the CryptoCell SBROM library is required to successfully build the BL image. The path to this library is specified via the `CCSBROM_LIB_PATH` variable. Please note that, mbedTLS is still required to do the X509 certificate ASN.1 parsing and CryptoCell is only utilized for signature and hash verification. Change-Id: If82dfbae0d7772ba1c64839f0b27850c103fe253 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 23 Jun, 2017 3 commits
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Etienne Carriere authored
Include io_dummy.h header file. Use static for device_type_dummy function. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
This change avoids warning about type conversion. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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Etienne Carriere authored
Use NULL instead of 0 where required. Include headers to have the prototype of the functions. Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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- 13 Jun, 2017 1 commit
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Haojian Zhuang authored
Should use AND (&), not &&. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 06 Jun, 2017 1 commit
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Antonio Nino Diaz authored
If `MBEDTLS_PLATFORM_SNPRINTF_ALT` isn't used, the function `mbedtls_platform_set_snprintf()` isn't defined. In case a platform uses a different mbed TLS configuration file than the one provided by the Trusted Firmware, and it doesn't define the mentioned build option, this will result in a build error. This patch modifies the initialization code so that `mbedtls_platform_set_snprintf()` is only used if `MBEDTLS_PLATFORM_SNPRINTF_ALT` is defined, allowing platforms to use it or not depending on their needs. Change-Id: I1d5c86d57e9b2871ba463030bf89210ebec5178e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Jun, 2017 2 commits
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Soby Mathew authored
This patch adds support for RSASSA-PSS Signature Algorithm for X509 certificates in mbedtls crypto driver. Now the driver supports RSA PKCS2_1 standard as mandated by TBBR. NOTE: With this patch, the PKCS1_5 standard compliant RSA signature is deprecated. Change-Id: I9cf6d073370b710cc36a7b374a55ec96c0496461 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
The mbedTLS library requires larger heap memory for verification of RSASSA-PSS signature in certificates during Trusted Board Boot. This patch increases the heap memory for the same. Change-Id: I3c3123d7142b7b7b01463516ec436734895da159 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 01 Jun, 2017 1 commit
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Jeenu Viswambharan authored
ARM GIC-600 IP complies with ARM GICv3 architecture, but among others, implements a power control register in the Redistributor frame. This register must be programmed to mark the frame as powered on, before accessing other registers in the frame. Rest of initialization sequence remains the same. The driver provides APIs for Redistributor power management, and overrides those in the generic GICv3 driver. The driver data is shared between generic GICv3 driver and that of GIC-600. For FVP platform, the GIC-600 driver is chosen when FVP_USE_GIC_DRIVER is set to FVP_GIC600. Also update user guide. Change-Id: I321b2360728d69f6d4b0a747b2cfcc3fe5a20d67 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 31 May, 2017 3 commits
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Antonio Nino Diaz authored
mbed TLS provides the debug API `mbedtls_memory_buffer_alloc_status()` to analyse the RAM usage of the library. When RSA is selected as algorithm, the maximum heap usage in FVP and Juno has been determined empirically to be approximately 5.5 KiB. However, The default heap size used when RSA is selected is 8 KiB. This patch reduces the buffer from 8 KiB to 6 KiB so that the BSS sections of both BL1 and BL2 are 2 KiB smaller when the firmware is compiled with TBB support. Change-Id: I43878a4e7af50c97be9c8d027c728c8483f24fbf Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Haojian Zhuang authored
Initialized the designware UFS PHY. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
If UFS device is initialized, we could just make it out of hibernation by UFS_FLAGS_SKIPINIT. And vendor's dirver is always focus on PHY setting. We could use UFS driver directly if it exits from hibernation. There're eight LUNs in UFS device. The UFS driver only provides the read/write API with LUN. User could define his own read/write since user may want to access different LUNs. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 24 May, 2017 1 commit
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Antonio Nino Diaz authored
The Trusted Firmware uses a subset of the APIs provided by mbed TLS. This subset internally uses `snprintf`, but the only format specifier used is '%d', which is supported by `tf_snprintf`. This patch makes mbed TLS use `tf_snprintf` instead of `snprintf`, saving 3 KB in both debug and release builds when TBBR is enabled. Change-Id: I7f992a21015930d7c0f4660e7a28ceefd60b9597 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 23 May, 2017 1 commit
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Masahiro Yamada authored
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 12 May, 2017 2 commits
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David Cunado authored
This patch renames MBEDTLS_KEY_ALG to TF_MBEDTLS_KEY_ALG. This completes the migration of TF specific macros so that they do not have the MBEDTLS_ suffix (see arm-trusted-firmware#874). Change-Id: Iad7632477e220b0af987c4db3cf52229fb127d00 Signed-off-by: David Cunado <david.cunado@arm.com>
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David Cunado authored
An earlier patch (arm-trusted-firmware#874) migrated MBEDTLS_ suffixed macros to have a TBBR_ suffix to avoid any potential clash with future mbedtls macros. But on reflection the TBBR_ suffix could be confusing as the macros are used to drive TF-specific configuration of mbedtls. As such this patch migrates these macros from TBBR_suffix to TF_MBEDTLS_ suffix which more accurately conveys their use. Change-Id: Ic87642b653ceeaa03d62f724976abd5e12e867d4 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 21 Apr, 2017 1 commit
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Varun Wadekar authored
This patch removes the code that touched UART_FCR, from console_core_putc(). The check for whether transmit FIFO is full is sufficient before writing to UART TX FIFO. In fact setting UARTFCR_TXCLR immediately after a byte is written to FIFO might even result in loss of that byte, if UART hasn't sent that byte out yet. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Apr, 2017 1 commit
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Antonio Nino Diaz authored
Many asserts depend on code that is conditionally compiled based on the DEBUG define. This patch modifies the conditional inclusion of such code so that it is based on the ENABLE_ASSERTIONS build option. Change-Id: I6406674788aa7e1ad7c23d86ce94482ad3c382bd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 18 Apr, 2017 1 commit
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Antonio Nino Diaz authored
C files shouldn't be included into others. This file only contains some macros and functions that can be made `static inline`, so it is ok to convert it into a header file. This is the only occurrence of a C file being included in another one in the codebase instead of using a header, other occurrences are a way of achieving backwards-compatibility. Functions therein have been qualified as `inline`. Change-Id: I88fe300f6d85a7f0740ef14c9cb8fa54849218e6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Apr, 2017 1 commit
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Antonio Nino Diaz authored
The amount of console output is controlled by the LOG_LEVEL build option. Using tf_printf without any #ifdef depending on the LOG_LEVEL doesn't give the user that flexibility. This patch replaces all occurrences of tf_printf that prints error, but aren't dependent on LOG_LEVEL, with the ERROR macro. Change-Id: Ib5147f14fc1579398a11f19ddd0e840ff6692831 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 31 Mar, 2017 2 commits
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Antonio Nino Diaz authored
It is needed to add placeholders for this function because, as this is not a `plat_xxx()` function, there aren't weak definitions of it in any file. If `console_flush()` is used and there isn't an implementation of `console_core_flush()` in any file, the compilation will fail. Change-Id: I50eb56d085c4c9fbc85d40c343e86af6412f3020 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This function ensures that console output is flushed, for example before shutting down or use by another component In line with other console APIs, console_flush() wraps console_core_flush(). Also implement console_core_flush() for PL011. Change-Id: I3db365065e4de04a454a5c2ce21be335a23a01e4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 22 Mar, 2017 1 commit
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dp-arm authored
These macros are not part of mbed TLS so they should not be prefixed with `MBEDTLS_` to avoid potential collision in the future. Use the `TBBR_` suffix to highlight that they only used in TF. `MBEDTLS_KEY_ALG` was not modified because that is documented and used by platforms to select the key algorithm. Change-Id: Ief224681715c481691c80810501830ce16e210b0 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 02 Mar, 2017 1 commit
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Soby Mathew authored
Due to incorrect conditional compilation checks, bakery locks were excluded from the CCN driver and the power controller driver for FVP when BL32 was built as the EL3 Runtime Software in AArch32 mode. This patch corrects the same. Change-Id: Ib1f163d9167a5c38e4d622232c4835cad9c235aa Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 01 Mar, 2017 1 commit
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Soby Mathew authored
The GIC driver data is initialized by the primary CPU with caches enabled. When the secondary CPU boots up, it initializes the GICC/GICR interface with the caches disabled and there is a chance that the driver data is not yet written back to the memory. This patch fixes this problem by flushing the driver data after they have been initialized. Change-Id: Ie9477029683846209593ff005d2bac559bb8f5e6 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 22 Feb, 2017 1 commit
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Jeenu Viswambharan authored
Static checks flag an assert added in commit 1f786b0f that compares unsigned value to 0, which will never fail. Change-Id: I4b02031c2cfbd9a25255d12156919dda7d4805a0 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 16 Feb, 2017 1 commit
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Antonio Nino Diaz authored
This reverts commit b621fb50 . Because of the Trusted Firmware design, timing-safe functions are not needed. Using them may be misleading as it could be interpreted as being a protection against private data leakage, which isn't the case here. For each image, the SHA-256 hash is calculated. Some padding is appended and the result is encrypted with a private key using RSA-2048. This is the signature of the image. The public key is stored along with BL1 in read-only memory and the encrypted hash is stored in the FIP. When authenticating an image, the TF decrypts the hash stored in the FIP and recalculates the hash of the image. If they don't match, the boot sequence won't continue. A constant-time comparison does not provide additional security as all the data involved in this process is already known to any attacker. There is no private data that can leaked through a timing attack when authenticating an image. `timingsafe_bcmp()` is kept in the codebase because it could be useful in the future. Change-Id: I44bdcd58faa586a050cc89447e38c142508c9888 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 14 Feb, 2017 2 commits
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dp-arm authored
cppcheck highlighted variables that were initialized but then later reassigned. Change-Id: Ie12742c01fd3bf48b2d6c05a3b448da91d57a2e4 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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Jeenu Viswambharan authored
The memmap IO driver doesn't perform bounds check when reading, writing, or seeking. The onus to vet parameters is on the caller, and this patch asserts that: - non-negative size is specified for for backing memory; - valid parameters are passed into the driver for read, write and seek operations. Change-Id: I6518c4065817e640e9e7e39a8a4577655f2680f7 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 06 Feb, 2017 1 commit
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Douglas Raillard authored
Replace all use of memset by zeromem when zeroing moderately-sized structure by applying the following transformation: memset(x, 0, sizeof(x)) => zeromem(x, sizeof(x)) As the Trusted Firmware is compiled with -ffreestanding, it forbids the compiler from using __builtin_memset and forces it to generate calls to the slow memset implementation. Zeromem is a near drop in replacement for this use case, with a more efficient implementation on both AArch32 and AArch64. Change-Id: Ia7f3a90e888b96d056881be09f0b4d65b41aa79e Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 24 Jan, 2017 1 commit
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Antonio Nino Diaz authored
To avoid timing side-channel attacks, it is needed to use a constant time memory comparison function when comparing hashes. The affected code only cheks for equality so it isn't needed to use any variant of memcmp(), bcmp() is enough. Also, timingsafe_bcmp() is as fast as memcmp() when the two compared regions are equal, so this change incurrs no performance hit in said case. In case they are unequal, the boot sequence wouldn't continue as normal, so performance is not an issue. Change-Id: I1c7c70ddfa4438e6031c8814411fef79fd3bb4df Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 23 Jan, 2017 2 commits
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Masahiro Yamada authored
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions. For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.) For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange. Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows: $(eval IMAGE := IMAGE_BL$(call uppercase,$(3))) $(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@ This means, IMAGE_BL* is defined when building the corresponding image, but *undefined* for the other images. So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Haojian Zhuang authored
Support Designware eMMC driver. It's based on both IO block and eMMC driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 19 Jan, 2017 1 commit
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Antonio Nino Diaz authored
In mbedtls_x509_parser.c there are some static arrays that are filled during the integrity check and then read whenever an authentication parameter is requested. However, they aren't cleared in case of an integrity check failure, which can be problematic from a security point of view. This patch clears these arrays in the case of failure. Change-Id: I9d48f5bc71fa13e5a75d6c45b5e34796ef13aaa2 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Jan, 2017 1 commit
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Masahiro Yamada authored
We are duplicating this macro define, and it is useful enough to be placed in the common place. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 10 Jan, 2017 1 commit
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Nishanth Menon authored
tbz check for RDR status is to check for a bit being zero. Unfortunately, we are using a mask rather than the bit position. Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf (page 17), LSR register bit 0 is Data ready status (RDR), not bit position 2. Update the same to match the specification. Reported-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
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- 06 Jan, 2017 1 commit
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Masahiro Yamada authored
This comment block says the default algorithm is ESDSA, while the code obviously sets the default to RSA: ifeq (${MBEDTLS_KEY_ALG},) MBEDTLS_KEY_ALG := rsa endif The git log of commit 7d37aa17 ("TBB: add mbedTLS authentication related libraries") states available options are: * 'rsa' (for RSA-2048) (default option) * 'ecdsa' (for ECDSA-SECP256R1) So, my best guess is the comment block is wrong. The mismatch between the code and the comment is confusing. Fix it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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