- 12 Jun, 2021 1 commit
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Peng Fan authored
Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor could use SDEI to do hypervisor management, after physical IRQ has been disabled routing. Signed-off-by:Peng Fan <peng.fan@nxp.com> Change-Id: I8308c629448bd8adca9d3d25701adcf0c5a6afc2
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- 30 Apr, 2021 1 commit
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Jacky Bai authored
on i.MX8MP A1 silicon, the OCRAM space is extended to 512K + 64K, currently, OCRAM @0x960000-0x980000 is reserved for BL31, it will leave the last 64KB in non-continuous space. To provide a continuous 384KB + 64KB space for generic use, so move the BL31 space to 0x970000-0x990000 range. Signed-off-by:Jacky Bai <ping.bai@nxp.com> Change-Id: I96d572fc0f87f05a60f55e0552a68b6e70f8e7f4
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- 19 Aug, 2020 1 commit
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Jacky Bai authored
The number of gpc imr mask reg & the offset is different on some SOC, so correct it & replace the magic number with macro define. Signed-off-by:Jacky Bai <ping.bai@nxp.com> Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74
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- 10 Jul, 2020 1 commit
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Jacky Bai authored
The i.MX 8MP Media Applications Processor is part of the growing i.MX8M family targeting the consumer and industrial market. It brings an effective Machine Learning and AI accelerator that enables a new class of applications. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad core Arm Cortex-A53 cluster and Cortex-M7 low-power coprocessor, audio digital signal processor, machine learning and graphics accelerators. Signed-off-by:Jacky Bai <ping.bai@nxp.com> Change-Id: I98311ebc32bee20af05031492e9fc24d06e55f4a
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