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  1. 23 Apr, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Add support for the SMC Calling Convention 2.0 · 2f370465
      Antonio Nino Diaz authored 
      

Due to differences in the bitfields of the SMC IDs, it is not possible
to support SMCCC 1.X and 2.0 at the same time.

The behaviour of `SMCCC_MAJOR_VERSION` has changed. Now, it is a build
option that specifies the major version of the SMCCC that the Trusted
Firmware supports. The only two allowed values are 1 and 2, and it
defaults to 1. The value of `SMCCC_MINOR_VERSION` is derived from it.

Note: Support for SMCCC v2.0 is an experimental feature to enable
prototyping of secure partition specifications. Support for this
convention is disabled by default and could be removed without notice.

Change-Id: I88abf9ccf08e9c66a13ce55c890edea54d9f16a7
Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2f370465
  3. 18 Apr, 2018 3 commits
  5. 17 Apr, 2018 2 commits
  7. 16 Apr, 2018 3 commits
  9. 13 Apr, 2018 10 commits
  11. 12 Apr, 2018 4 commits
  13. 11 Apr, 2018 5 commits
  15. 10 Apr, 2018 8 commits
  17. 09 Apr, 2018 4 commits
    • Varun Wadekar's avatar
      lib: xlat_tables_v2: reduce time required to add a mmap region · 0ed32232
      Varun Wadekar authored 
      

The last entry in the mapping table is not necessarily the same as the
end of the table. This patch loops through the table to find the last
entry marker, on every new mmap addition. The memove operation then
has to only move the memory between current entry and the last entry.
For platforms that arrange their MMIO map properly, this opearation
turns out to be a NOP.

The previous implementation added significant overhead per mmap
addition as the memmove operation always moved the difference between
the current mmap entry and the end of the table.

Tested on Tegra platforms and this new approach improves the memory
mapping time by ~75%, thus significantly reducing boot time on some
platforms.

Change-Id: Ie3478fa5942379282ef58bee2085da799137e2ca
Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      0ed32232
    • Dimitris Papastamos's avatar
      Merge pull request #1328 from JiafeiPan/upstream-bl2-rom · c39afead
      Dimitris Papastamos authored 
      Add support for BL2 in XIP memory
      c39afead
    • Amit Daniel Kachhap's avatar
      Juno: Increase bl2 max size to fix build when SPD=opteed · 83a2376e
      Amit Daniel Kachhap authored 
      

Building TBBR(SPD=opteed) and non-TBBR TF-A images is breaking for
Juno for different configurations listed below:

* Overflow error of 4096 bytes for rsa algorithm.
* Overflow error of 8192 bytes for ecdsa algorithm.
* Overflow error of 4096 bytes for rsa+ecdsa algorithm.
* Overflow error of 4096 bytes for non-TBBR case.

So this patch increments macro PLAT_ARM_MAX_BL2_SIZE for all the above
cases accordingly.

Change-Id: I75ec6c0a718181d34553fe55437f0496f467683f
Signed-off-by: default avatarAmit Daniel Kachhap <amit.kachhap@arm.com>
      83a2376e
    • Amit Daniel Kachhap's avatar
      DMC500: Add platform support to set system interface count · d12afc8e
      Amit Daniel Kachhap authored 
      

Some low end platforms using DMC500 memory controller do not have
CCI(Cache Coherent Interconnect) interface and only have non-coherent
system interface support. Hence this patch makes the system interface
count configurable from the platforms.

Change-Id: I6d54c90eb72fd18026c6470c1f7fd26c59dc4b9a
Signed-off-by: default avatarAmit Daniel Kachhap <amit.kachhap@arm.com>
      d12afc8e