1. 25 May, 2018 1 commit
  2. 23 Apr, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Add support for the SMC Calling Convention 2.0 · 2f370465
      Antonio Nino Diaz authored
      
      
      Due to differences in the bitfields of the SMC IDs, it is not possible
      to support SMCCC 1.X and 2.0 at the same time.
      
      The behaviour of `SMCCC_MAJOR_VERSION` has changed. Now, it is a build
      option that specifies the major version of the SMCCC that the Trusted
      Firmware supports. The only two allowed values are 1 and 2, and it
      defaults to 1. The value of `SMCCC_MINOR_VERSION` is derived from it.
      
      Note: Support for SMCCC v2.0 is an experimental feature to enable
      prototyping of secure partition specifications. Support for this
      convention is disabled by default and could be removed without notice.
      
      Change-Id: I88abf9ccf08e9c66a13ce55c890edea54d9f16a7
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2f370465
  3. 27 Mar, 2018 1 commit
    • Joel Hutton's avatar
      Clean usage of void pointers to access symbols · 9f85f9e3
      Joel Hutton authored
      
      
      Void pointers have been used to access linker symbols, by declaring an
      extern pointer, then taking the address of it. This limits symbols
      values to aligned pointer values. To remove this restriction an
      IMPORT_SYM macro has been introduced, which declares it as a char
      pointer and casts it to the required type.
      
      Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
      Signed-off-by: default avatarJoel Hutton <Joel.Hutton@Arm.com>
      9f85f9e3
  4. 14 Jun, 2017 1 commit
  5. 03 May, 2017 1 commit
  6. 26 Apr, 2017 1 commit
  7. 10 Aug, 2016 1 commit
    • Soby Mathew's avatar
      AArch32: Add API to invoke runtime service handler · 1ae0a49a
      Soby Mathew authored
      This patch adds an API in runtime service framework to
      invoke the registered handler corresponding to the SMC function
      identifier. This is helpful for AArch32 because the number of
      arguments required by the handler is more than registers
      available as per AArch32 program calling conventions and
      requires the use of stack. Hence this new API will do the
      necessary argument setup and invoke the appropriate
      handler. Although this API is primarily intended for AArch32,
      it can be used for AArch64 as well.
      
      Change-Id: Iefa15947fe5a1df55b0859886e677446a0fd7241
      1ae0a49a
  8. 26 Jul, 2016 1 commit
    • Soby Mathew's avatar
      Improve debug assertion for runtime svc number · 5e5e4162
      Soby Mathew authored
      This patch improves the debug assertion for runtime svc number
       - Remove useless comparison ensuring that the number of descriptors
         is a positive number. The variable is an unsigned integer so can't
         be negative.
       - Check that the end address of the descriptors is sane relative
         to the start address.
      
      Change-Id: Iea7be6b34e33b8b1cbd394eb923cc834ea964831
      5e5e4162
  9. 25 Jul, 2016 2 commits
    • Sandrine Bailleux's avatar
      Make runtime_svc_init() function more robust · 3a26a28c
      Sandrine Bailleux authored
       - Added some debug assertions checking that the runtime services
         indexes computed by get_unique_oen() are sane.
      
       - Do not print the name of the service when its descriptor is
         invalid. If the descriptor is corrupted then its name field
         could be corrupted as well and we would end up reading an
         arbitrary amount of invalid memory.
      
      Change-Id: I16f61065277d01fe1555d5a9cf743f7b52ccaa60
      3a26a28c
    • Sandrine Bailleux's avatar
      Improvements to runtime service init code · 9d24d353
      Sandrine Bailleux authored
      Light refactoring of the code in runtime_svc.c file.
      
       - Declare validate_rt_svc_desc()'s argument as const.
      
       - Remove 'goto' path in runtime_svc_init(). It was used in one
         place only.
      
       - Improve code readability by declaring a local variable holding the
         service pointer.
      
      Change-Id: I3b15c5adb9f37b786b5b993a9be70ea9dd017a83
      9d24d353
  10. 18 Jul, 2016 2 commits
    • Soby Mathew's avatar
      Introduce `el3_runtime` and `PSCI` libraries · 532ed618
      Soby Mathew authored
      This patch moves the PSCI services and BL31 frameworks like context
      management and per-cpu data into new library components `PSCI` and
      `el3_runtime` respectively. This enables PSCI to be built independently from
      BL31. A new `psci_lib.mk` makefile is introduced which adds the relevant
      PSCI library sources and gets included by `bl31.mk`. Other changes which
      are done as part of this patch are:
      
      * The runtime services framework is now moved to the `common/` folder to
        enable reuse.
      * The `asm_macros.S` and `assert_macros.S` helpers are moved to architecture
        specific folder.
      * The `plat_psci_common.c` is moved from the `plat/common/aarch64/` folder
        to `plat/common` folder. The original file location now has a stub which
        just includes the file from new location to maintain platform compatibility.
      
      Most of the changes wouldn't affect platform builds as they just involve
      changes to the generic bl1.mk and bl31.mk makefiles.
      
      NOTE: THE `plat_psci_common.c` FILE HAS MOVED LOCATION AND THE STUB FILE AT
      THE ORIGINAL LOCATION IS NOW DEPRECATED. PLATFORMS SHOULD MODIFY THEIR
      MAKEFILES TO INCLUDE THE FILE FROM THE NEW LOCATION.
      
      Change-Id: I6bd87d5b59424995c6a65ef8076d4fda91ad5e86
      532ed618
    • Soby Mathew's avatar
      Rework type usage in Trusted Firmware · 4c0d0390
      Soby Mathew authored
      This patch reworks type usage in generic code, drivers and ARM platform files
      to make it more portable. The major changes done with respect to
      type usage are as listed below:
      
      * Use uintptr_t for storing address instead of uint64_t or unsigned long.
      * Review usage of unsigned long as it can no longer be assumed to be 64 bit.
      * Use u_register_t for register values whose width varies depending on
        whether AArch64 or AArch32.
      * Use generic C types where-ever possible.
      
      In addition to the above changes, this patch also modifies format specifiers
      in print invocations so that they are AArch64/AArch32 agnostic. Only files
      related to upcoming feature development have been reworked.
      
      Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
      4c0d0390
  11. 18 Feb, 2016 1 commit
    • Antonio Nino Diaz's avatar
      Add support for %p in tf_printf() · f0dd061a
      Antonio Nino Diaz authored
      This patch adds support for the `%p` format specifier in tf_printf()
      following the example of the printf implementation of the stdlib used
      in the trusted firmware.
      
      Fixes ARM-software/tf-issues#292
      
      Change-Id: I0b3230c783f735d3e039be25a9405f00023420da
      f0dd061a
  12. 21 Dec, 2015 1 commit
  13. 06 Mar, 2015 1 commit
    • Sandrine Bailleux's avatar
      Enable type-checking of arguments passed to printf() et al. · dad25049
      Sandrine Bailleux authored
      This patch modifies the declarations of the functions printf() et al.
      and adds the right GCC attribute to request the compiler to check
      the type of the arguments passed to these functions against the given
      format string. This will ensure that the compiler outputs warning
      messages like the following whenever it detects an inconsistency:
      
       file.c:42: warning: format ‘%d’ expects type ‘int’, but argument 3 has type ‘long int’
      
      It also fixes the type mismatch inconsistencies that it revealed
      across the code base.
      
      NOTE: THIS PATCH MAY FORCE PLATFORM PORTS OR SP/SPDS THAT USE THE
      PRINTF FAMILY OF FUNCTIONS TO FIX ANY TYPE MISMATCH INCONSISTENCIES.
      
      Change-Id: If36bb54ec7d6dd2cb4791d89b02a24ac13fd2df6
      dad25049
  14. 24 Jun, 2014 1 commit
  15. 23 May, 2014 1 commit
    • Soby Mathew's avatar
      Non-Secure Interrupt support during Standard SMC processing in TSP · 239b04fa
      Soby Mathew authored
      Implements support for Non Secure Interrupts preempting the
      Standard SMC call in EL1. Whenever an IRQ is trapped in the
      Secure world we securely handover to the Normal world
      to process the interrupt. The normal world then issues
      "resume" smc call to resume the previous interrupted SMC call.
      Fixes ARM-software/tf-issues#105
      
      Change-Id: I72b760617dee27438754cdfc9fe9bcf4cc024858
      239b04fa
  16. 16 May, 2014 1 commit
    • Soby Mathew's avatar
      Rework BL3-1 unhandled exception handling and reporting · a43d431b
      Soby Mathew authored
      This patch implements the register reporting when unhandled exceptions are
      taken in BL3-1. Unhandled exceptions will result in a dump of registers
      to the console, before halting execution by that CPU. The Crash Stack,
      previously called the Exception Stack, is used for this activity.
      This stack is used to preserve the CPU context and runtime stack
      contents for debugging and analysis.
      
      This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3,
      to provide easy access to some of BL3-1 per-cpu data structures.
      Initially, this is used to provide a pointer to the Crash stack.
      
      panic() now prints the the error file and line number in Debug mode
      and prints the PC value in release mode.
      
      The Exception Stack is renamed to Crash Stack with this patch.
      The original intention of exception stack is no longer valid
      since we intend to support several valid exceptions like IRQ
      and FIQ in the trusted firmware context. This stack is now
      utilized for dumping and reporting the system state when a
      crash happens and hence the rename.
      
      Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception
      
      Change-Id: I260791dc05536b78547412d147193cdccae7811a
      a43d431b
  17. 06 May, 2014 3 commits
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
    • Dan Handley's avatar
      Always use named structs in header files · fb037bfb
      Dan Handley authored
      Add tag names to all unnamed structs in header files. This
      allows forward declaration of structs, which is necessary to
      reduce header file nesting (to be implemented in a subsequent
      commit).
      
      Also change the typedef names across the codebase to use the _t
      suffix to be more conformant with the Linux coding style. The
      coding style actually prefers us not to use typedefs at all but
      this is considered a step too far for Trusted Firmware.
      
      Also change the IO framework structs defintions to use typedef'd
      structs to be consistent with the rest of the codebase.
      
      Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
      fb037bfb
    • Dan Handley's avatar
      Move include and source files to logical locations · 4ecca339
      Dan Handley authored
      Move almost all system include files to a logical sub-directory
      under ./include. The only remaining system include directories
      not under ./include are specific to the platform. Move the
      corresponding source files to match the include directory
      structure.
      
      Also remove pm.h as it is no longer used.
      
      Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
      4ecca339
  18. 26 Feb, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Tolerate runtime service initialization failure · 090630e4
      Jeenu Viswambharan authored
      At present, the firmware panics if a runtime service fails to
      initialize. An earlier patch had implemented late binding for all
      runtime service handlers.
      
      With that in place, this patch allows the firmware to proceed even when
      a service fails to initialize.
      
      Change-Id: I6cf4de2cecea9719f4cd48272a77cf459b080d4e
      090630e4
  19. 17 Feb, 2014 3 commits
    • Jeenu Viswambharan's avatar
      Add support for handling runtime service requests · caa84939
      Jeenu Viswambharan authored
      
      
      This patch uses the reworked exception handling support to handle
      runtime service requests through SMCs following the SMC calling
      convention. This is a giant commit since all the changes are
      inter-related. It does the following:
      
      1. Replace the old exception handling mechanism with the new one
      2. Enforce that SP_EL0 is used C runtime stacks.
      3. Ensures that the cold and warm boot paths use the 'cpu_context'
         structure to program an ERET into the next lower EL.
      4. Ensures that SP_EL3 always points to the next 'cpu_context'
         structure prior to an ERET into the next lower EL
      5. Introduces a PSCI SMC handler which completes the use of PSCI as a
         runtime service
      
      Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852
      Co-authored-by: default avatarAchin Gupta <achin.gupta@arm.com>
      caa84939
    • Achin Gupta's avatar
      Introduce new exception handling framework · 07f4e078
      Achin Gupta authored
      This patch introduces the reworked exception handling logic which lays
      the foundation for accessing runtime services in later patches. The
      type of an exception has a greater say in the way it is
      handled. SP_EL3 is used as the stack pointer for:
      
      1. Determining the type of exception and handling the unexpected ones
         on the exception stack
      
      2. Saving and restoring the essential general purpose and system
         register state after exception entry and prior to exception exit.
      
      SP_EL0 is used as the stack pointer for handling runtime service
      requests e.g. SMCs. A new structure for preserving general purpose
      register state has been added to the 'cpu_context' structure. All
      assembler ensures that it does not use callee saved registers
      (x19-x29). The C runtime preserves them across functions calls. Hence
      EL3 code does not have to save and restore them explicitly.
      
      Since the exception handling framework has undergone substantial change,
      the changes have been kept in separate files to aid readability. These
      files will replace the existing ones in subsequent patches.
      
      Change-Id: Ice418686592990ff7a4260771e8d6676e6c8c5ef
      07f4e078
    • Achin Gupta's avatar
      Add runtime services framework · 7421b465
      Achin Gupta authored
      This patch introduces the framework to enable registration and
      initialisation of runtime services. PSCI is registered and initialised
      as a runtime service. Handling of runtime service requests will be
      implemented in subsequent patches.
      
      Change-Id: Id21e7ddc5a33d42b7d6e455b41155fc5441a9547
      7421b465
  20. 17 Jan, 2014 1 commit
  21. 05 Dec, 2013 2 commits
    • Achin Gupta's avatar
      psci: fix error due to a non zero context id · c8afc789
      Achin Gupta authored
      In the previous psci implementation, the psci_afflvl_power_on_finish()
      function would run into an error condition if the value of the context
      id parameter in the cpu_on and cpu_suspend psci calls was != 0. The
      parameter was being restored as the return value of the affinity level
      0 finisher function. A non zero context id would be treated as an
      error condition. This would prevent successful wake up of the cpu from
      a power down state. Also, the contents of the general purpose
      registers were not being cleared upon return to the non-secure world
      after a cpu power up. This could potentially allow the non-secure
      world to view secure data.
      
      This patch ensures that all general purpose registers are set to ~0
      prior to the final eret that drops the execution to the non-secure
      world. The context id is used to initialize the general purpose
      register x0 prior to re-entry into the non-secure world and is no
      longer restored as a function return value. A platform helper
      (platform_get_stack()) has been introduced to facilitate this change.
      
      Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
      c8afc789
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  22. 25 Oct, 2013 1 commit