1. 02 May, 2019 1 commit
    • Christoph Müllner's avatar
      rockchip: Disable binary generation for all SoCs. · 33218d2a
      Christoph Müllner authored
      
      
      All supported Rockchip SoCs (RK3288, RK3328, RK3368 and RK3399)
      have non-continuous memory areas in the linker script with a huge
      gap between them. This results in extremely padded binary images
      with a size of about 4 GiB.
      
      E.g. on the RK3399 we have the following memory areas (and base addresses):
      RAM (0x1000), SRAM (0xFF8C0000), and PMUSRAM (0xFF3B0000).
      
      Consumers of the TF-A project (e.g. coreboot or U-Boot) therefore
      use the ELF image instead, which has a size of a few hundred kBs.
      
      In order to prevent the generation of a huge and useless file,
      this patch disables the binary generation for all affected Rockchip
      SoCs.
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: I4ac65bdf1e598c3e1a59507897d183aee9a36916
      33218d2a
  2. 01 May, 2019 3 commits
    • Christoph Müllner's avatar
      rockchip: Allow console device to be set by DTB. · 220c33a2
      Christoph Müllner authored
      
      
      Currently the compile-time constant PLAT_RK_UART_BASE defines
      which UART is used as console device. E.g. on RK3399 it is set
      to UART2. That means, that a single bl31 image can not be used
      for two boards, which just differ on the UART console.
      
      This patch addresses this limitation by parsing the "stdout-path"
      property from the "chosen" node in the DTB. The expected property
      string is expected to have the form "serialN:XXX", with
      N being either 0, 1, 2, 3 or 4. When the property is found, it will
      be used to override PLAT_RK_UART_BASE.
      
      Tested on RK3399-Q7, with a stdout-path of "serial0:115200n8".
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: Iafe1320e77ab006c121f8d52745d54cef68a48c7
      220c33a2
    • Christoph Müllner's avatar
      rockchip: Add params_setup to RK3328. · f476e63f
      Christoph Müllner authored
      
      
      params_setup.c provides the function params_early_setup, which
      takes care of parsing ATF parameters (bl31_plat_param array,
      fdt or coreboot table). As params_early_setup is defined as weak
      symbol in bl31_plat_setup.c, providing a platform-specific
      bl31_plat_setup implementation is optional.
      
      This patch adds the rockchip-common params_setup.c to the sources
      for RK3328. This streamlines the parameter handling for all supported
      rockchip SoCs.
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: I071c03106114364ad2fc408e49cc791fe5b35925
      f476e63f
    • Christoph Müllner's avatar
      rockchip: Streamline and complete UARTn_BASE macros. · 0957b9b2
      Christoph Müllner authored
      
      
      In order to set the UART base during bootup in common code of
      plat/rockchip, we need to streamline the way the UART base addresses
      are defined and add the missing definitions and mappings.
      
      This patch does so by following the pattern UARTn_BASE, which is
      already in use on RK3399 and RK3328. The numbering itself is derived
      from the upstream Linux DTS files of the individual SoCs.
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
      0957b9b2
  3. 26 Apr, 2019 1 commit
    • Heiko Stuebner's avatar
      rockchip: only include libfdt in non-coreboot cases · 4200e5aa
      Heiko Stuebner authored
      
      
      While mainline u-boot always expects to submit the devicetree
      as platform param, coreboot always uses the existing parameter
      structure. As libfdt is somewhat big, it makes sense to limit
      its inclusion to where necessary and thus only to non-coreboot
      builds.
      
      libfdt itself will get build in all cases, but only the non-
      coreboot build will actually reference and thus include it.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
      4200e5aa
  4. 25 Apr, 2019 5 commits
    • Heiko Stuebner's avatar
      rockchip: add support for rk3288 · 780e3f24
      Heiko Stuebner authored
      
      
      The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
      with later SoCs.
      
      Working features are general non-secure mode (the gic needs special
      love for that), psci-based smp bringing cpu cores online and also
      taking them offline again, psci-based suspend (the simpler variant
      also included in the linux kernel, deeper suspend following later)
      and I was also already able to test HYP-mode and was able to boot
      a virtual kernel using kvm.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a
      780e3f24
    • Heiko Stuebner's avatar
      rockchip: add common aarch32 support · 82e18f89
      Heiko Stuebner authored
      
      
      There are a number or ARMv7 Rockchip SoCs that are very similar in their
      bringup routines to the existing arm64 SoCs, so there is quite a high
      commonality possible here.
      
      Things like virtualization also need psci and hyp-mode and instead of
      trying to cram this into bootloaders like u-boot, barebox or coreboot
      (all used in the field), re-use the existing infrastructure in TF-A
      for this (both Rockchip plat support and armv7 support in general).
      
      So add core support for aarch32 Rockchip SoCs, with actual soc support
      following in a separate patch.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b
      82e18f89
    • Heiko Stuebner's avatar
      rockchip: rk3328: drop double declaration of entry_point storage · 48bea0f3
      Heiko Stuebner authored
      
      
      The cpuson_entry_point and cpuson_flags are already declared in
      plat_private.h so there is no need to have it again declared in
      the local pmu.h, especially as it may cause conflicts when the
      other type changes.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: I80ae0e23d22f67109ed96f8ac059973b6de2ce87
      48bea0f3
    • Heiko Stuebner's avatar
      rockchip: Allow socs with undefined wfe check bits · 3b5b888d
      Heiko Stuebner authored
      
      
      Some older socs like the rk3288 do not have the necessary registers
      to check the wfi/wfe state of the cpu cores. Allow this case an "just"
      do an additional delay similar to how the Linux kernel handles smp
      right now.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: I0f67af388b06b8bfb4a9bac411b4900ac266a77a
      3b5b888d
    • Heiko Stuebner's avatar
      rockchip: move pmusram assembler code to a aarch64 subdir · c3aaabaf
      Heiko Stuebner authored
      
      
      The current code doing power-management from sram is highly
      arm64-specific so should live in a corresponding subdirectory
      and not in the common area.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9
      c3aaabaf
  5. 24 Apr, 2019 1 commit
    • Christoph Müllner's avatar
      rk3399: m0: Fix compiler warnings. · af81a91f
      Christoph Müllner authored
      
      
      GCC complains for quite some versions, when compiling the M0 firmware
      for Rockchip's rk3399 platform, about an invalid type of function 'main':
      
        warning: return type of 'main' is not 'int' [-Wmain]
      
      This patch addresses this, by renaming the function to 'm0_main'.
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: I10887f2bda6bdb48c5017044c264139004f7c785
      af81a91f
  6. 14 Mar, 2019 1 commit
    • Heiko Stuebner's avatar
      rockchip: add an fdt parsing stub for platform param · 7029e806
      Heiko Stuebner authored
      
      
      The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
      While Coreboot does submit the list of linked parameter structs as
      platform param, upstream u-boot actually always provides a pointer
      to a devicetree as parameter.
      This results in current ATF not running at all when started from U-Boot.
      
      To fix this, add a stub that checks if the parameter is a fdt so we
      can at least boot and not get stuck. Later on we can extend this with
      actual parsing of information from the devicetree.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
      7029e806
  7. 01 Feb, 2019 1 commit
  8. 28 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      rockchip: Fix GICv2 interrupts · d31dcdc5
      Antonio Nino Diaz authored
      After the removal of deprecated interfaces in TF 2.0 the migration to
      the new GIC driver interfaces was done incorrectly in rk3328 and rk3368:
      2d6f1f01
      
       ("rockchip: Migrate to new interfaces").
      
      In the GICv2 driver it is mandated that all interrupts are Group 0
      interrupts. This patch simply moves all Group 1 interrupts to Group 0.
      
      Change-Id: I224c0135603eb5b81bd512976361500c0d129a91
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      d31dcdc5
  9. 04 Jan, 2019 1 commit
    • Antonio Nino Diaz's avatar
      Sanitise includes across codebase · 09d40e0e
      Antonio Nino Diaz authored
      Enforce full include path for includes. Deprecate old paths.
      
      The following folders inside include/lib have been left unchanged:
      
      - include/lib/cpus/${ARCH}
      - include/lib/el3_runtime/${ARCH}
      
      The reason for this change is that having a global namespace for
      includes isn't a good idea. It defeats one of the advantages of having
      folders and it introduces problems that are sometimes subtle (because
      you may not know the header you are actually including if there are two
      of them).
      
      For example, this patch had to be created because two headers were
      called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform
      to avoid collision."). More recently, this patch has had similar
      problems: 46f9b2c3 ("drivers: add tzc380 support").
      
      This problem was introduced in commit 4ecca339
      
       ("Move include and
      source files to logical locations"). At that time, there weren't too
      many headers so it wasn't a real issue. However, time has shown that
      this creates problems.
      
      Platforms that want to preserve the way they include headers may add the
      removed paths to PLAT_INCLUDES, but this is discouraged.
      
      Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      09d40e0e
  10. 07 Dec, 2018 1 commit
    • Julius Werner's avatar
      drivers/console: Link console framework code by default · 985ee0b7
      Julius Werner authored
      
      
      This patch makes the build system link the console framework code by
      default, like it already does with other common libraries (e.g. cache
      helpers). This should not make a difference in practice since TF is
      linked with --gc-sections, so the linker will garbage collect all
      functions and data that are not referenced by any other code. Thus, if a
      platform doesn't want to include console code for size reasons and
      doesn't make any references to console functions, the code will not be
      included in the final binary.
      
      To avoid compatibility issues with older platform ports, only make this
      change for the MULTI_CONSOLE_API.
      
      Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      985ee0b7
  11. 08 Nov, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Standardise header guards across codebase · c3cf06f1
      Antonio Nino Diaz authored
      
      
      All identifiers, regardless of use, that start with two underscores are
      reserved. This means they can't be used in header guards.
      
      The style that this project is now to use the full name of the file in
      capital letters followed by 'H'. For example, for a file called
      "uart_example.h", the header guard is UART_EXAMPLE_H.
      
      The exceptions are files that are imported from other projects:
      
      - CryptoCell driver
      - dt-bindings folders
      - zlib headers
      
      Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      c3cf06f1
  12. 25 Oct, 2018 1 commit
  13. 10 Oct, 2018 1 commit
  14. 28 Sep, 2018 1 commit
    • Antonio Nino Diaz's avatar
      rockchip: Migrate to new interfaces · 2d6f1f01
      Antonio Nino Diaz authored
      
      
      - Migrate to new GIC interfaces.
      - Migrate to bl31_early_platform_setup2().
      - Use bl31_warm_entrypoint() instead of psci_entrypoint().
      - Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE.
      - Update Makefile paths.
      - Remove references to removed build options.
      - Use private definition of bl31_params_t.
      
      Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      2d6f1f01
  15. 21 Sep, 2018 1 commit
    • Daniel Boulby's avatar
      Ensure the flow through switch statements is clear · a08a2014
      Daniel Boulby authored
      
      
      Ensure case clauses:
      *   Terminate with an unconditional break, return or goto statement.
      *   Use conditional break, return or goto statements as long as the end
          of the case clause is unreachable; such case clauses must terminate
          with assert(0) /* Unreachable */ or an unconditional  __dead2 function
          call
      *   Only fallthough when doing otherwise would result in less
          readable/maintainable code; such case clauses must terminate with a
          /* Fallthrough */ comment to make it clear this is the case and
          indicate that a fallthrough is intended.
      
      This reduces the chance of bugs appearing due to unintended flow through a
      switch statement
      
      Change-Id: I70fc2d1f4fd679042397dec12fd1982976646168
      Signed-off-by: default avatarDaniel Boulby <daniel.boulby@arm.com>
      a08a2014
  16. 22 Aug, 2018 1 commit
  17. 15 Aug, 2018 1 commit
  18. 20 Jul, 2018 1 commit
  19. 11 Jul, 2018 1 commit
  20. 14 Jun, 2018 1 commit
    • Roberto Vargas's avatar
      Make TF UUID RFC 4122 compliant · 03364865
      Roberto Vargas authored
      
      
      RFC4122 defines that fields are stored in network order (big endian),
      but TF-A stores them in machine order (little endian by default in TF-A).
      We cannot change the future UUIDs that are already generated, but we can store
      all the bytes using arrays and modify fiptool to generate the UUIDs with
      the correct byte order.
      
      Change-Id: I97be2d3168d91f4dee7ccfafc533ea55ff33e46f
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      03364865
  21. 13 Jun, 2018 1 commit
    • Paul Kocialkowski's avatar
      rockchip: Move stdint header to the offending header file · fb83888b
      Paul Kocialkowski authored
      
      
      The stdint header was introduced to rk3399's plat_sip_calls.c in order
      to fix missing stdint definitions. However, ordering headers
      alphabetically caused the fix to be ineffective, as stint was then
      included after the offending header file (dfs.h).
      
      Move the stdint include to that header to properly fix the issue.
      
      Change-Id: Ieaad37a7932786971488ab58fc5b169bfa79e197
      Signed-off-by: default avatarPaul Kocialkowski <contact@paulk.fr>
      fb83888b
  22. 15 May, 2018 3 commits
    • Derek Basehore's avatar
      rockchip/rk3399: Add watchdog support in pmusram · 5b886432
      Derek Basehore authored
      
      
      To catch early hangs in resume, this sets up the watchdog before
      anything else in the pmusram code (ignoring setting up the stack...).
      This uses hard coded settings for the watchdog until the proper
      watchdog restore later on in the firmware/kernel.
      
      This also restores the old watchdog register values before the PLLs
      are restored to make sure we don't temporarily switch over to a 1/3s
      timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz.
      
      Change-Id: I8f7652089a88783271b17482117b4609330abe80
      Signed-off-by: default avatarDerek Basehore <dbasehore@chromium.org>
      5b886432
    • Lin Huang's avatar
      rockchip/rk3399: Split M0 binary into two · ff4735cf
      Lin Huang authored
      
      
      All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
      when SOC enter into FSM, and SRAM will shutdown during this time, so
      this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
      put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
      part still run in SRAM, and suspend part run in PMUSRAM.
      
      Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
      Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
      ff4735cf
    • Lin Huang's avatar
      rockchip/rk3399: improve pmu powermode configure when suspend · 133598cb
      Lin Huang authored
      
      
      we need to enable PMU_WKUP_RST_EN for pmu powermode configure, since
      enable wakeup reset will hold the soc status, so the SOC will not affect
      by some power or other single glitch when resume, and keep the soc in the
      right status. And it not need to enable DDRIO_RET_HW_DE_REQ, the ddr resume
      will do it manual.
      
      Change-Id: Ib4af897ffb3cb63dc2aa9a6002e5d9ef86ee4a49
      Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
      133598cb
  23. 27 Apr, 2018 2 commits
    • Masahiro Yamada's avatar
      types: use int-ll64 for both aarch32 and aarch64 · 0a2d5b43
      Masahiro Yamada authored
      Since commit 031dbb12
      
       ("AArch32: Add essential Arch helpers"),
      it is difficult to use consistent format strings for printf() family
      between aarch32 and aarch64.
      
      For example, uint64_t is defined as 'unsigned long long' for aarch32
      and as 'unsigned long' for aarch64.  Likewise, uintptr_t is defined
      as 'unsigned int' for aarch32, and as 'unsigned long' for aarch64.
      
      A problem typically arises when you use printf() in common code.
      
      One solution could be, to cast the arguments to a type long enough
      for both architectures.  For example, if 'val' is uint64_t type,
      like this:
      
        printf("val = %llx\n", (unsigned long long)val);
      
      Or, somebody may suggest to use a macro provided by <inttypes.h>,
      like this:
      
        printf("val = %" PRIx64 "\n", val);
      
      But, both would make the code ugly.
      
      The solution adopted in Linux kernel is to use the same typedefs for
      all architectures.  The fixed integer types in the kernel-space have
      been unified into int-ll64, like follows:
      
          typedef signed char           int8_t;
          typedef unsigned char         uint8_t;
      
          typedef signed short          int16_t;
          typedef unsigned short        uint16_t;
      
          typedef signed int            int32_t;
          typedef unsigned int          uint32_t;
      
          typedef signed long long      int64_t;
          typedef unsigned long long    uint64_t;
      
      [ Linux commit: 0c79a8e29b5fcbcbfd611daf9d500cfad8370fcf ]
      
      This gets along with the codebase shared between 32 bit and 64 bit,
      with the data model called ILP32, LP64, respectively.
      
      The width for primitive types is defined as follows:
      
                         ILP32           LP64
          int            32              32
          long           32              64
          long long      64              64
          pointer        32              64
      
      'long long' is 64 bit for both, so it is used for defining uint64_t.
      'long' has the same width as pointer, so for uintptr_t.
      
      We still need an ifdef conditional for (s)size_t.
      
      All 64 bit architectures use "unsigned long" size_t, and most 32 bit
      architectures use "unsigned int" size_t.  H8/300, S/390 are known as
      exceptions; they use "unsigned long" size_t despite their architecture
      is 32 bit.
      
      One idea for simplification might be to define size_t as 'unsigned long'
      across architectures, then forbid the use of "%z" string format.
      However, this would cause a distortion between size_t and sizeof()
      operator.  We have unknowledge about the native type of sizeof(), so
      we need a guess of it anyway.  I want the following formula to always
      return 1:
      
        __builtin_types_compatible_p(size_t, typeof(sizeof(int)))
      
      Fortunately, ARM is probably a majority case.  As far as I know, all
      32 bit ARM compilers use "unsigned int" size_t.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      0a2d5b43
    • Masahiro Yamada's avatar
      Fix pointer type mismatch of handlers · 57d1e5fa
      Masahiro Yamada authored
      Commit 4c0d0390
      
       ("Rework type usage in Trusted Firmware") changed
      the type usage in struct declarations, but did not touch the definition
      side.  Fix the type mismatch.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      57d1e5fa
  24. 07 Apr, 2018 1 commit
  25. 27 Mar, 2018 1 commit
    • Joel Hutton's avatar
      Clean usage of void pointers to access symbols · 9f85f9e3
      Joel Hutton authored
      
      
      Void pointers have been used to access linker symbols, by declaring an
      extern pointer, then taking the address of it. This limits symbols
      values to aligned pointer values. To remove this restriction an
      IMPORT_SYM macro has been introduced, which declares it as a char
      pointer and casts it to the required type.
      
      Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
      Signed-off-by: default avatarJoel Hutton <Joel.Hutton@Arm.com>
      9f85f9e3
  26. 26 Mar, 2018 1 commit
  27. 21 Mar, 2018 1 commit
    • Antonio Nino Diaz's avatar
      Rename 'smcc' to 'smccc' · 085e80ec
      Antonio Nino Diaz authored
      
      
      When the source code says 'SMCC' it is talking about the SMC Calling
      Convention. The correct acronym is SMCCC. This affects a few definitions
      and file names.
      
      Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
      but the old files have been kept for compatibility, they include the
      new ones with an ERROR_DEPRECATED guard.
      
      Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      085e80ec
  28. 20 Mar, 2018 1 commit
    • Lin Huang's avatar
      rockchip/rk3399: save/restore watchdog register correctly · 56bf9407
      Lin Huang authored
      
      
      there are two fix for save/restore watchdog register:
      1. watchdog plck will shutdown after secure_watchdog_disable(), so need
         to save register before it and restore after secure_watchdog_enable().
      2. need write 0x76 to cnt_restart to keep watchdog alive when restore
         watchdog register.
      
      Change-Id: I1f6fbceae22186e3b72a87df6332a110adf37479
      Signed-off-by: default avatarLin Huang <hl@rock-chips.com>
      56bf9407
  29. 27 Feb, 2018 1 commit
  30. 21 Feb, 2018 1 commit
  31. 30 Jan, 2018 1 commit
    • Caesar Wang's avatar
      rockchip/rk3399: Fix memory corruptions or illegal memory access · de3c3007
      Caesar Wang authored
      
      
      Coverity scan done for the coreboot project found the issue:
      Coverity (*** CID 1385418: Memory - illegal accesses (OVERRUN))
      Coverity (*** CID 1385419: Memory - corruptions  (OVERRUN))
      
      Fix the Converity error issue with store_cru[] loop needs to be one
      element bigger.
      
      Fixes: ARM-software/tf-issues#544
      
      Change-Id: I420f0a660b24baaa5fc5e78fca242cf750c9bbc7
      Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
      de3c3007