1. 12 Jul, 2018 2 commits
  2. 09 Jul, 2018 1 commit
  3. 06 Jul, 2018 2 commits
  4. 05 Jul, 2018 4 commits
  5. 04 Jul, 2018 4 commits
  6. 03 Jul, 2018 10 commits
    • Andre Przywara's avatar
      allwinner: Add Allwinner H6 SoC support · bed42a5d
      Andre Przywara authored
      
      
      The H6 is Allwinner's most recent SoC. It shares most peripherals with the
      other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory
      map.
      
      Introduce a separate platform target, which includes a different header
      file to cater for the address differences. Also add the new build target
      to the documentation.
      
      The new ATF platform name is "sun50i_h6".
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      bed42a5d
    • Sandrine Bailleux's avatar
      Fix incorrect pointer conversion in SMC_UUID_RET() · 43b8fa8e
      Sandrine Bailleux authored
      
      
      Casting a pointer to a struct uuid into a pointer to uint32_t may
      result in a pointer that is not correctly aligned, which constitutes
      an undefined behaviour. In the case of TF, this also generates a data
      abort because alignment fault checking is enabled (through the SCTLR.A
      bit).
      
      This patch modifies the SMC_UUID_RET() macro to read the uuid
      structure without any pointer aliasing. A helper function then
      combines every set of 4 bytes into a 32-bit value suitable to be
      returned through the x0-x3 registers.
      
      This fixes a violation of MISRA rule 11.3.
      
      Change-Id: I53ee73bb4cb332f4d8286055ceceb6f347caa080
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      43b8fa8e
    • Sandrine Bailleux's avatar
      AArch32: Force compiler to align memory accesses · a9c4dde3
      Sandrine Bailleux authored
      Alignment fault checking is always enabled in TF (by setting the
      SCTLR.A bit). Thus, all instructions that load or store one or more
      registers have an alignment check that the address being accessed is
      aligned to the size of the data element(s) being accessed. If this
      check fails it causes an Alignment fault, which is taken as a Data
      Abort exception.
      
      The compiler needs to be aware that it must not emit load and store
      instructions resulting in unaligned accesses. It already is for
      AArch64 builds (see commit fa1d3712
      
       "Add -mstrict-align to the gcc
      options"), this patch does the same for AArch32 builds.
      
      Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      a9c4dde3
    • Antonio Nino Diaz's avatar
      xlat v2: Update documentation · 5cff8823
      Antonio Nino Diaz authored
      
      
      Update documentation to reflect the current state of the library.
      
      Change-Id: Ic72f90ee322d2ebd6ea7f4296315700d6bc434e6
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      5cff8823
    • Dimitris Papastamos's avatar
      Merge pull request #1459 from antonio-nino-diaz-arm/an/xlat-refactor · 700b6da7
      Dimitris Papastamos authored
      Refactor of the xlat tables v2 library
      700b6da7
    • Dimitris Papastamos's avatar
      Merge pull request #1458 from Andre-ARM/allwinner/fixes · c2f27ced
      Dimitris Papastamos authored
      allwinner: various smaller fixes
      c2f27ced
    • Dimitris Papastamos's avatar
      Merge pull request #1447 from Amit-Radur/bl32_v1 · 73b1a02f
      Dimitris Papastamos authored
      allwinner: Add BL32 (corresponds to Trusted OS) support
      73b1a02f
    • Antonio Nino Diaz's avatar
      xlat v2: Make get/set attrs functions less verbose · 6a086061
      Antonio Nino Diaz authored
      
      
      It is useful to have LOG_LEVEL_VERBOSE because it prints the memory map
      of each image, but that also means that the change_mem_attributes and
      get_mem_attributes functions have verbose prints, and generate a too
      long text output that hides other useful information.
      
      As they were mostly there for debug purposes, this patch removes them.
      
      Change-Id: I2986537377d1f78be2b79cc8a6cf230c380bdb55
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      6a086061
    • Antonio Nino Diaz's avatar
      xlat v2: Clean debug xlat tables descriptor print · f9d58d17
      Antonio Nino Diaz authored
      
      
      The previous debug output for EL1&0 translation regimes was too verbose,
      which makes it hard to read and hides the intent behind the parameters
      assigned to each region. This patch simplifies this output and makes the
      outputs for EL3 and EL1&0 mostly the same. The difference is that in
      EL1&0 it is specified whether the region is exclusively accessible from
      EL1 (PRIV) or both EL0 and EL1 (USER).
      
      For example:
      
          MEM-RW(PRIV)-NOACCESS(USER)-XN(PRIV)-XN(USER)-S
          MEM-RO(PRIV)-NOACCESS(USER)-EXEC(PRIV)-EXEC(USER)-S
      
      After the change, it becomes this:
      
          MEM-RW-XN-PRIV-S
          MEM-RO-EXEC-PRIV-S
      
      Change-Id: I15f4b99058429d42107fbf89e15f4838a9b559a5
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      f9d58d17
    • Antonio Nino Diaz's avatar
      xlat v2: Split code into separate files · fd2299e6
      Antonio Nino Diaz authored
      
      
      Instead of having one big file with all the code, it's better to have
      a few smaller files that are more manageable:
      
      - xlat_tables_core.c: Code related to the core functionality of the
        library (map and unmap regions, initialize xlat context).
      - xlat_tables_context.c: Instantiation of the active image context
        as well as APIs to manipulate it.
      - xlat_tables_utils.c: Helper code that isn't part of the core
        functionality (change attributes, debug print messages).
      
      Change-Id: I3ea956fc1afd7473c0bb5e7c6aab3b2e5d88c711
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      fd2299e6
  7. 02 Jul, 2018 3 commits
  8. 29 Jun, 2018 2 commits
  9. 28 Jun, 2018 12 commits