- 12 Jul, 2018 2 commits
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Anson Huang authored
Add system reset support for i.MX8QX, when Linux kernel issues "reboot" command, TF-A will send command to inform system controller to reset whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
Add system power off support for i.MX8QX, when Linux kernel issues "poweroff" command, TF-A will send command to inform system controller to power off whole board according to board design, tested on i.MX8QX MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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- 09 Jul, 2018 1 commit
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Dimitris Papastamos authored
tools/cert_create: fix makefile to build build_msg.o by HOSTCC
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- 06 Jul, 2018 2 commits
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Ying-Chun Liu (PaulLiu) authored
Previously build_msg.o is built by CC. It causes FTBFS when CC is not equal to HOSTCC. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Dimitris Papastamos authored
rpi3: Add support for Trusted Board Boot
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- 05 Jul, 2018 4 commits
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Dimitris Papastamos authored
allwinner: Add H6 SoC support
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Ying-Chun Liu (PaulLiu) authored
Add paragraph for how to enable Trusted Board Boot for rpi3 Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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Ying-Chun Liu (PaulLiu) authored
For Trusted Board Boot we enlarge the BL1 size from 64k to 128k. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Ying-Chun Liu (PaulLiu) authored
This patch adds support for TBB to rpi3. The ROTPK is generated at build time and is included into BL1/BL2. The key and content certificates are read over semihosting. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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- 04 Jul, 2018 4 commits
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Dimitris Papastamos authored
xlat v2: Update documentation
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Dimitris Papastamos authored
Extend FIP io driver to support multiple FIP devices
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Andre Przywara authored
A proper link to Samuel's github page was missing. Add this to make the link actually work. Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Dimitris Papastamos authored
Fixes related to unaligned accesses
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- 03 Jul, 2018 10 commits
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Andre Przywara authored
The H6 is Allwinner's most recent SoC. It shares most peripherals with the other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory map. Introduce a separate platform target, which includes a different header file to cater for the address differences. Also add the new build target to the documentation. The new ATF platform name is "sun50i_h6". Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Sandrine Bailleux authored
Casting a pointer to a struct uuid into a pointer to uint32_t may result in a pointer that is not correctly aligned, which constitutes an undefined behaviour. In the case of TF, this also generates a data abort because alignment fault checking is enabled (through the SCTLR.A bit). This patch modifies the SMC_UUID_RET() macro to read the uuid structure without any pointer aliasing. A helper function then combines every set of 4 bytes into a 32-bit value suitable to be returned through the x0-x3 registers. This fixes a violation of MISRA rule 11.3. Change-Id: I53ee73bb4cb332f4d8286055ceceb6f347caa080 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
Alignment fault checking is always enabled in TF (by setting the SCTLR.A bit). Thus, all instructions that load or store one or more registers have an alignment check that the address being accessed is aligned to the size of the data element(s) being accessed. If this check fails it causes an Alignment fault, which is taken as a Data Abort exception. The compiler needs to be aware that it must not emit load and store instructions resulting in unaligned accesses. It already is for AArch64 builds (see commit fa1d3712 "Add -mstrict-align to the gcc options"), this patch does the same for AArch32 builds. Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Antonio Nino Diaz authored
Update documentation to reflect the current state of the library. Change-Id: Ic72f90ee322d2ebd6ea7f4296315700d6bc434e6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Dimitris Papastamos authored
Refactor of the xlat tables v2 library
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Dimitris Papastamos authored
allwinner: various smaller fixes
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Dimitris Papastamos authored
allwinner: Add BL32 (corresponds to Trusted OS) support
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Antonio Nino Diaz authored
It is useful to have LOG_LEVEL_VERBOSE because it prints the memory map of each image, but that also means that the change_mem_attributes and get_mem_attributes functions have verbose prints, and generate a too long text output that hides other useful information. As they were mostly there for debug purposes, this patch removes them. Change-Id: I2986537377d1f78be2b79cc8a6cf230c380bdb55 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The previous debug output for EL1&0 translation regimes was too verbose, which makes it hard to read and hides the intent behind the parameters assigned to each region. This patch simplifies this output and makes the outputs for EL3 and EL1&0 mostly the same. The difference is that in EL1&0 it is specified whether the region is exclusively accessible from EL1 (PRIV) or both EL0 and EL1 (USER). For example: MEM-RW(PRIV)-NOACCESS(USER)-XN(PRIV)-XN(USER)-S MEM-RO(PRIV)-NOACCESS(USER)-EXEC(PRIV)-EXEC(USER)-S After the change, it becomes this: MEM-RW-XN-PRIV-S MEM-RO-EXEC-PRIV-S Change-Id: I15f4b99058429d42107fbf89e15f4838a9b559a5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Instead of having one big file with all the code, it's better to have a few smaller files that are more manageable: - xlat_tables_core.c: Code related to the core functionality of the library (map and unmap regions, initialize xlat context). - xlat_tables_context.c: Instantiation of the active image context as well as APIs to manipulate it. - xlat_tables_utils.c: Helper code that isn't part of the core functionality (change attributes, debug print messages). Change-Id: I3ea956fc1afd7473c0bb5e7c6aab3b2e5d88c711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 02 Jul, 2018 3 commits
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Dimitris Papastamos authored
make_cert: return error when invalid options are used
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Dimitris Papastamos authored
Couple of fixups for K3 platform
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Ruchika Gupta authored
Platform can define MAX_NUM_FIP_DEVICES in platform_def.h to define the number of FIP io devices. The FIP driver doesn't support muliple open file. So only one single file can be open at a time across multiple FIP devices. For any FIP device, an image should be loaded fully before moving on to the next image. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
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- 29 Jun, 2018 2 commits
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Andrew F. Davis authored
To wake a core from wfi interrupts must be enabled, in some cases they may not be and so we can lock up here. Unconditionally enable interrupts before wfi and then restore interrupt state. Signed-off-by: Andrew F. Davis <afd@ti.com>
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Andrew F. Davis authored
Actions may need to be taken by the last core when all clusters have been shutdown. Add a top level root domain node to coordinate this between clusters. Signed-off-by: Andrew F. Davis <afd@ti.com>
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- 28 Jun, 2018 12 commits
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Andre Przywara authored
As Samuel contributed most of the original code and he has an interest in that, add him as a second maintainer for the Allwinner port. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
So far we already support booting on two different SoCs, and we will shortly add a third, so add some code to determine the current SoC type. This can be later used to runtime detect certain properties. Also print the SoC name to the console, to give valuable debug information. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
There is nothing we need from the BootROM area, so we also don't need to map it in EL3. Remove the mapping and reduce the number of MMAP regions by one. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
The DRAM controller supports up to 4GB of DRAM, and there are actually boards out there where we can use at least 3GB of this. Relax the PSCI entry point check, to be not restricted to 2GB of DRAM. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
The "#ifdef SUNXI_SPC_BASE" guard was meant to allow the build on SoCs without a Secure Peripherals Controller, so that we skip that part of the security setup. But in the current position this will trigger a warning about an unused variable. Simply move the guard one line up to cover the variable as well. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
The "INFO" output in sunxi_cpu_ops.c is quite verbose, so make this more obvious by changing the log level to "VERBOSE" and so avoiding it to be printed in a normal (even debug) build. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
The relative VER_REG *offset* is the same across all known SoCs, so we can define this offset near it's user. Remove it from the memory map. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
Add two empty lines to denote the paragraphs properly and improve readability. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Andre Przywara authored
Some code in sunxi_common.c requires symbols defined in sunxi_private.h, so add the header to that file. It was included via another header before, but let's make this explicit. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Amit Singh Tomar authored
This patch is an attempt to run Trusted OS (OP-TEE OS being one of them) along side BL31 image. ATF supports multiple SPD's that can take dispatcher name (opteed for OP-TEE OS) as an input using the 'SPD=<dispatcher name>' option during bl31 build. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
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Dimitris Papastamos authored
maintainers: Modify format of file
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Antonio Nino Diaz authored
The previous format was not very practical and hard to parse by scripts. The current format is easier as it uses more tokens that can be identified by scripts, while maintaining a reasonably good result when it is rendered. Some maintainers maintain more than one subsystem but they were all part of the same entry. In cases like this the entry has been split into two to clarify what file belongs to which subsystem. The list of maintainers of the Trusted Firmware has been updated. Change-Id: I4be2d527c5171e8d2d86fb49e45e1d9dbcbd2d80 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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