1. 22 May, 2014 1 commit
    • Achin Gupta's avatar
      Rework 'state' field usage in per-cpu TSP context · 3ee8a164
      Achin Gupta authored
      This patch lays the foundation for using the per-cpu 'state' field in
      the 'tsp_context' structure for other flags apart from the power state
      of the TSP.
      
      It allocates 2 bits for the power state, introduces the necessary
      macros to manipulate the power state in the 'state' field and
      accordingly reworks all use of the TSP_STATE_* states.
      
      It also allocates a flag bit to determine if the TSP is handling a
      standard SMC. If this flag is set then the TSP was interrupted due to
      non-secure or EL3 interupt depending upon the chosen routing
      model. Macros to get, set and clear this flag have been added as
      well. This flag will be used by subsequent patches.
      
      Change-Id: Ic6ee80bd5895812c83b35189cf2c3be70a9024a6
      3ee8a164
  2. 06 May, 2014 3 commits
    • Dan Handley's avatar
      Reduce deep nesting of header files · 97043ac9
      Dan Handley authored
      Reduce the number of header files included from other header
      files as much as possible without splitting the files. Use forward
      declarations where possible. This allows removal of some unnecessary
      "#ifndef __ASSEMBLY__" statements.
      
      Also, review the .c and .S files for which header files really need
      including and reorder the #include statements alphabetically.
      
      Fixes ARM-software/tf-issues#31
      
      Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
      97043ac9
    • Dan Handley's avatar
      Always use named structs in header files · fb037bfb
      Dan Handley authored
      Add tag names to all unnamed structs in header files. This
      allows forward declaration of structs, which is necessary to
      reduce header file nesting (to be implemented in a subsequent
      commit).
      
      Also change the typedef names across the codebase to use the _t
      suffix to be more conformant with the Linux coding style. The
      coding style actually prefers us not to use typedefs at all but
      this is considered a step too far for Trusted Firmware.
      
      Also change the IO framework structs defintions to use typedef'd
      structs to be consistent with the rest of the codebase.
      
      Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
      fb037bfb
    • Dan Handley's avatar
      Make use of user/system includes more consistent · 35e98e55
      Dan Handley authored
      Make codebase consistent in its use of #include "" syntax for
      user includes and #include <> syntax for system includes.
      
      Fixes ARM-software/tf-issues#65
      
      Change-Id: If2f7c4885173b1fd05ac2cde5f1c8a07000c7a33
      35e98e55
  3. 26 Feb, 2014 1 commit
    • Jeenu Viswambharan's avatar
      Implement late binding for runtime hooks · 7f366605
      Jeenu Viswambharan authored
      At present SPD power management hooks and BL3-2 entry are implemented
      using weak references. This would have the handlers bound and registered
      with the core framework at build time, but leaves them dangling if a
      service fails to initialize at runtime.
      
      This patch replaces implementation by requiring runtime handlers to
      register power management and deferred initialization hooks with the
      core framework at runtime. The runtime services are to register the
      hooks only as the last step, after having all states successfully
      initialized.
      
      Change-Id: Ibe788a2a381ef39aec1d4af5ba02376e67269782
      7f366605
  4. 20 Feb, 2014 1 commit
    • Achin Gupta's avatar
      Add power management support in the SPD · 607084ee
      Achin Gupta authored
      This patch implements a set of handlers in the SPD which are called by
      the PSCI runtime service upon receiving a power management
      operation. These handlers in turn pass control to the Secure Payload
      image if required before returning control to PSCI. This ensures that
      the Secure Payload has complete visibility of all power transitions in
      the system and can prepare accordingly.
      
      Change-Id: I2d1dba5629b7cf2d53999d39fe807dfcf3f62fe2
      607084ee