- 06 May, 2014 11 commits
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danh-arm authored
dh/major refactoring
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Dan Handley authored
Reduce the number of header files included from other header files as much as possible without splitting the files. Use forward declarations where possible. This allows removal of some unnecessary "#ifndef __ASSEMBLY__" statements. Also, review the .c and .S files for which header files really need including and reorder the #include statements alphabetically. Fixes ARM-software/tf-issues#31 Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
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Dan Handley authored
Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit). Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware. Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase. Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
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Dan Handley authored
Move the PSCI global functions out of psci_private.h and into psci.h to allow the standard service to only depend on psci.h. Change-Id: I8306924a3814b46e70c1dcc12524c7aefe06eed1
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Dan Handley authored
Move the BL function prototypes out of arch.h and into the appropriate header files to allow more efficient header file inclusion. Create new BL private header files where there is no sensible existing header file. Change-Id: I45f3e10b72b5d835254a6f25a5e47cf4cfb274c3
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Dan Handley authored
Move the function prototypes from gic.h into either gic_v2.h or gic_v3.h as appropriate. Update the source files to include the correct headers. Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
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Dan Handley authored
Separate out the CASSERT macro out of bl_common.h into its own header to allow more efficient header inclusion. Change-Id: I291be0b6b8f9879645e839a8f0dd1ec9b3db9639
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Dan Handley authored
Remove all usage of the vpath keyword in makefiles as it was prone to mistakes. Specify the relative paths to source files instead. Also reorder source files in makefiles alphabetically. Fixes ARM-software/tf-issues#121 Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
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Dan Handley authored
Make codebase consistent in its use of #include "" syntax for user includes and #include <> syntax for system includes. Fixes ARM-software/tf-issues#65 Change-Id: If2f7c4885173b1fd05ac2cde5f1c8a07000c7a33
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Dan Handley authored
Move the FVP power driver to a directory under the FVP platform port as this is not a generically usable driver. Change-Id: Ibc78bd88752eb3e3964336741488349ac345f4f0
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Dan Handley authored
Move almost all system include files to a logical sub-directory under ./include. The only remaining system include directories not under ./include are specific to the platform. Move the corresponding source files to match the include directory structure. Also remove pm.h as it is no longer used. Change-Id: Ie5ea6368ec5fad459f3e8a802ad129135527f0b3
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- 01 May, 2014 1 commit
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achingupta authored
Preserve PSCI cpu_suspend 'power_state' parameter.
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- 29 Apr, 2014 1 commit
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Vikram Kanigiri authored
This patch saves the 'power_state' parameter prior to suspending a cpu and invalidates it upon its resumption. The 'affinity level' and 'state id' fields of this parameter can be read using a set of public and private apis. Validation of power state parameter is introduced which checks for SBZ bits are zero. This change also takes care of flushing the parameter from the cache to main memory. This ensures that it is available after cpu reset when the caches and mmu are turned off. The earlier support for saving only the 'affinity level' field of the 'power_state' parameter has also been reworked. Fixes ARM-Software/tf-issues#26 Fixes ARM-Software/tf-issues#130 Change-Id: Ic007ccb5e39bf01e0b67390565d3b4be33f5960a
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- 24 Apr, 2014 4 commits
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danh-arm authored
Hl/secure memory
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Harry Liebel authored
Fixes ARM-software/tf-issues#64 Change-Id: I4e56c25f9dc7f486fbf6fa2f7d8253874119b989
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Harry Liebel authored
- Use the TrustZone controller on Base FVP to program DRAM access permissions. By default no access to DRAM is allowed if 'secure memory' is enabled on the Base FVP. - The Foundation FVP does not have a TrustZone controller but instead has fixed access permissions. - Update FDTs for Linux to use timers at the correct security level. - Starting the FVPs with 'secure memory' disabled is also supported. Limitations: Virtio currently uses a reserved NSAID. This will be corrected in future FVP releases. Change-Id: I0b6c003a7b5982267815f62bcf6eb82aa4c50a31
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Harry Liebel authored
The TZC-400 performs security checks on transactions to memory or peripherals. Separate regions can be created in the address space each with individual security settings. Limitations: This driver does not currently support raising an interrupt on access violation. Change-Id: Idf8ed64b4d8d218fc9b6f9d75acdb2cd441d2449
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- 22 Apr, 2014 2 commits
- 16 Apr, 2014 3 commits
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danh-arm authored
Rename FVP "mmap" array to avoid name confusion
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Dan Handley authored
Remove redundant code in plat_secondary_cold_boot_setup() in plat/fvp/aarch64/bl1_plat_helpers.S. Fixes ARM-software/tf-issues#136 Change-Id: I98c0a46d95cfea33125e34e609c83dc2c97cd86e
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danh-arm authored
Allocate single stacks for BL1 and BL2 (v2)
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- 15 Apr, 2014 3 commits
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Andrew Thoelke authored
The BL images share common stack management code which provides one coherent and one cacheable stack for every CPU. BL1 and BL2 just execute on the primary CPU during boot and do not require the additional CPU stacks. This patch provides separate stack support code for UP and MP images, substantially reducing the RAM usage for BL1 and BL2 for the FVP platform. This patch also provides macros for declaring stacks and calculating stack base addresses to improve consistency where this has to be done in the firmware. The stack allocation source files are now included via platform.mk rather than the common BLx makefiles. This allows each platform to select the appropriate MP/UP stack support for each BL image. Each platform makefile must be updated when including this commit. Fixes ARM-software/tf-issues#76 Change-Id: Ia251f61b8148ffa73eae3f3711f57b1ffebfa632
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Dan Handley authored
Rename the array "mmap" in plat/fvp/aarch64/plat_common.c to "fvp_mmap", to avoid confusion with the array of the same name in lib/arch/aarch64/xlat_tables.c Fixes ARM-software/tf-issues#114 Change-Id: I61478c0070aa52d5dcf5d85af2f353f56c060cfb
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danh-arm authored
Using GCC --gc-sections to eliminate unused code and data
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- 14 Apr, 2014 1 commit
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Dan Handley authored
Rename drivers/console/console.c to drivers/arm/peripherals/pl011/pl011_console.c. This makes it clear that this is a pl011 specific console implementation. Fixes ARM-software/tf-issues#129 Change-Id: Ie2f8109602134c5b86993e32452c70734c45a3ed
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- 11 Apr, 2014 1 commit
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danh-arm authored
Fix system counter initialisation
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- 08 Apr, 2014 2 commits
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Sandrine Bailleux authored
BL3-1 architecture setup code programs the system counter frequency into the CNTFRQ_EL0 register. This frequency is defined by the platform, though. This patch introduces a new platform hook that the architecture setup code can call to retrieve this information. In the ARM FVP port, this returns the first entry of the frequency modes table from the memory mapped generic timer. All system counter setup code has been removed from BL1 as some platforms may not have initialized the system counters at this stage. The platform specific settings done exclusively in BL1 have been moved to BL3-1. In the ARM FVP port, this consists in enabling and initializing the System level generic timer. Also, the frequency change request in the counter control register has been set to 0 to make it explicit it's using the base frequency. The CNTCR_FCREQ() macro has been fixed in this context to give an entry number rather than a bitmask. In future, when support for firmware update is implemented, there is a case where BL1 platform specific code will need to program the counter frequency. This should be implemented at that time. This patch also updates the relevant documentation. It properly fixes ARM-software/tf-issues#24 Change-Id: If95639b279f75d66ac0576c48a6614b5ccb0e84b
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Sandrine Bailleux authored
This reverts commit 1c297bf0 because it introduced a bug: the CNTFRQ_EL0 register was no longer programmed by all CPUs. bl31_platform_setup() function is invoked only in the cold boot path and consequently only on the primary cpu. A subsequent commit will correctly implement the necessary changes to the counter frequency setup code. Fixes ARM-software/tf-issues#125 Conflicts: docs/firmware-design.md plat/fvp/bl31_plat_setup.c Change-Id: Ib584ad7ed069707ac04cf86717f836136ad3ab54
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- 07 Apr, 2014 1 commit
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danh-arm authored
Add missing #include guard in xlat_tables.h
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- 04 Apr, 2014 1 commit
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danh-arm authored
Update contributing.md with new integration process
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- 03 Apr, 2014 1 commit
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Sandrine Bailleux authored
Change-Id: I7272a800accb7de71cbbf6b715a43061bbf79f8c
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- 01 Apr, 2014 1 commit
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Dan Handley authored
Contributions will now be merged into an ARM Trusted Firmware integration branch on GitHub instead of via an ARM internal branch.
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- 26 Mar, 2014 7 commits
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Andrew Thoelke authored
This extends the --gc-sections behaviour to the many assembler support functions in the firmware images by placing each function into its own code section. This is achieved by creating a 'func' macro used to declare each function label. Fixes ARM-software/tf-issues#80 Change-Id: I301937b630add292d2dec6d2561a7fcfa6fec690
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Andrew Thoelke authored
All common functions are being built into all binary images, whether or not they are actually used. This change enables the use of -ffunction-sections, -fdata-sections and --gc-sections in the compiler and linker to remove unused code and data from the images. Change-Id: Ia9f78c01054ac4fa15d145af38b88a0d6fb7d409
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Achin Gupta authored
This patch fixes a build failure when TSPD support is included. The failure was due to a missing semi-colon at the end of a C statement in tspd_common.c Change-Id: I8fbd0d500bd9145b15f862b8686e570b80fcce8c
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Sandrine Bailleux authored
The Makefile used to specify a blacklist of rules for which dependency checking must not be triggered. This list included cleaning rules only, whereas all other non-build targets (e.g. help, checkpatch, etc.) should also be included. This approach seems a bit fragile because it is easy to forget some non-building rules in the blacklist, as the experience showed us. It is more robust to specify a whitelist of rules for which dependency checking is required. Fixes ARM-software/tf-issues#112 Change-Id: I030c405abb35972a726a5200396430316d18f963
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Vikram Kanigiri authored
This patch reworks the console driver to ensure that each bootloader stage initializes it independently. As a result, both BL3-1 and BL2 platform code now calls console_init() instead of relying on BL1 to perform console setup Fixes ARM-software/tf-issues#120 Change-Id: Ic4d66e0375e40a2fc7434afcabc8bbb4715c14ab
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Soby Mathew authored
This commit isolates the accessor functions in pl011.c and builds a wrapper layer for console functions. This also modifies the console driver to use the pl011 FIFO. Fixes ARM-software/tf-issues#63 Change-Id: I3b402171cd14a927831bf5e5d4bb310b6da0e9a8
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Sandrine Bailleux authored
It used to be possible to build all bootloader binaries for all platforms using 'PLAT=all'. This feature has been removed but there are still some traces of its existence. This patch removes them. Change-Id: Ic671a5c20c5b64acbd0a912d2e4db8f9d9574610
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