1. 29 Dec, 2020 1 commit
    • Alexei Fedorov's avatar
      Plat AXG: Fix PLAT_MAX_PWR_LVL value · 47f2445a
      Alexei Fedorov authored
      
      
      This patch fixes AXG platform build error:
      plat/amlogic/axg/axg_pm.c: In function 'axg_pwr_domain_off':
      plat/amlogic/axg/axg_pm.c:124:43: error: array subscript 2
       is above array bounds of 'const plat_local_state_t[2]'
       {aka 'const unsigned char[2]'}
      by changing PLAT_MAX_PWR_LVL from MPIDR_AFFLVL1 to MPIDR_AFFLVL2
      in plat\amlogic\axg\include\platform_def.h.
      
      Change-Id: I9a701e8f26231e62f844920aec5830664f3fb324
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      47f2445a
  2. 06 Feb, 2020 2 commits
    • Carlo Caione's avatar
      amlogic: axg: Add a build flag when using ATOS as BL32 · 72d2535a
      Carlo Caione authored
      
      
      BL2 is unconditionally setting 0 (OPTEE_AARCH64) in arg0 even when the
      BL32 image is 32bit (OPTEE_AARCH32). This is causing the boot to hang
      when ATOS (32bit Amlogic BL32 binary-only TEE OS) is used.
      
      Since we are not aware of any Amlogic platform shipping a 64bit version
      of ATOS we can hardcode OPTEE_AARCH32 / MODE_RW_32 when using ATOS.
      Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
      Change-Id: Iaea47cf6dc48bf8a646056761f02fb81b41c78a3
      72d2535a
    • Carlo Caione's avatar
      amlogic: axg: Add support for the A113D (AXG) platform · afd241e7
      Carlo Caione authored
      
      
      Introduce the preliminary support for the Amlogic A113D (AXG) SoC.
      
      This port is a minimal implementation of BL31 capable of booting
      mainline U-Boot, Linux and chainloading BL32 (ATOS).
      
      Tested on a A113D board.
      Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
      Change-Id: Ic4548fa2f7c48d61b485b2a6517ec36c53c20809
      afd241e7