- 05 Dec, 2013 3 commits
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Dan Handley authored
- Add instructions for contributing to ARM Trusted Firmware. - Update copyright text in all files to acknowledge contributors. Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
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Sandrine Bailleux authored
This patch makes sure the C runtime environment is properly initialised before executing any C code. - Zero-initialise NOBITS sections (e.g. the bss section). - Relocate BL1 data from ROM to RAM. Change-Id: I0da81b417b2f0d1f7ef667cc5131b1e47e22571f
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Sandrine Bailleux authored
- Check at link-time that bootloader images will fit in memory at run time and that they won't overlap each other. - Remove text and rodata orphan sections. - Define new linker symbols to remove the need for platform setup code to know the order of sections. - Reduce the size of the raw binary images by cutting some sections out of the disk image and allocating them at load time, whenever possible. - Rework alignment constraints on sections. - Remove unused linker symbols. - Homogenize linker symbols names across all BLs. - Add some comments in the linker scripts. Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
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- 27 Nov, 2013 4 commits
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Sandrine Bailleux authored
On FVP platforms, for now it is assumed that the normal-world bootloader is already sitting in its final memory location. Therefore, BL2 doesn't need to load it and so it doesn't need to know the extents of the non-trusted DRAM. Change-Id: I33177ab43ca242edc8958f2fa8d994e7cf3e0843
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Sandrine Bailleux authored
Also, don't invalidate the TLBs in disable_mmu() function, it's better to do it in enable_mmu() function just before actually enabling the MMU. Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1
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Sandrine Bailleux authored
Global and static variables are expected to be initialised to zero by default. This is specified by the C99 standard. This patch removes some unnecessary initialisations of such variables. It fixes a compilation warning at the same time: plat/fvp/bl31_plat_setup.c:82:3: warning: missing braces around initializer [-Wmissing-braces] section("tzfw_coherent_mem"))) = {0}; ^ plat/fvp/bl31_plat_setup.c:82:3: warning: (near initialization for ‘ns_entry_info[0]’) [-Wmissing-braces] Note that GCC should not have emitted this warning message in the first place. The C Standard permits braces to be elided around subaggregate initializers. See this GCC bug report: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119 Change-Id: I13cb0c344feb9803bca8819f976377741fa6bc35
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Sandrine Bailleux authored
blx_plat_arch_setup() should only perform platform-specific architectural setup, e.g. enabling the MMU. This patch moves generic architectural setup code out of blx_plat_arch_setup(). Change-Id: I4ccf56b8c4a2fa84909817779a2d97a14aaafab6
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- 14 Nov, 2013 2 commits
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Harry Liebel authored
- The Foundation FVP only has one cluster and does not have CCI. Change-Id: If91e81ff72c52e448150089c4cfea3e4d6ae1232
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Harry Liebel authored
- Writing to this register with a 64bit access can cause a Systen Error Exception on some models. Change-Id: Ibcf5bdf7ab55707db61c16298f25caff50e1ff7e
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- 25 Oct, 2013 1 commit
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Achin Gupta authored
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