- 15 Jun, 2017 1 commit
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Anthony Zhou authored
Main fixes: * Added explicit casts (e.g. 0U) to integers in order for them to be compatible with whatever operation they're used in [Rule 10.1] * Force operands of an operator to the same type category [Rule 10.4] * Added curly braces ({}) around if/while statements in order to make them compound [Rule 15.6] * Added parentheses [Rule 12.1] * Voided non C-library functions whose return types are not used [Rule 17.7] Change-Id: I91404edec2e2194b1ce2672d2a3fc6a1f5bf41f1 Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 14 Jun, 2017 1 commit
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Varun Wadekar authored
This patch enables the 'sign-compare' flag, to enable warning/errors for comparisons between signed/unsigned variables. The warning has been enabled for all the Tegra platforms, to start with. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 07 Apr, 2017 1 commit
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Varun Wadekar authored
This patch splits the MCE driver into public and private interfaces to allow usage of common functionality across multiple SoCs. Change-Id: Ib58080e730d72f11ff79507d8e0acffb2ad5c606 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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- 20 Mar, 2017 1 commit
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Varun Wadekar authored
The CPU Complex (CCPLEX) Power Manager (Denver MCE, or DMCE) is an offload engine for BPMP to do voltage related sequencing and for hardware requests to be handled in a better latency than BPMP-firmware. There are two interfaces to the MCEs - Abstract Request Interface (ARI) and the traditional NVGINDEX/NVGDATA interface. MCE supports various commands which can be used by CPUs - ARM as well as Denver, for power management and reset functionality. Since the linux kernel is the master for all these scenarios, each MCE command can be issued by a corresponding SMC. These SMCs have been moved to SiP SMC space as they are specific to the Tegra186 SoC. Change-Id: I67bee83d2289a8ab63bc5556e5744e5043803e51 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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