- 01 Jun, 2017 1 commit
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Antonio Nino Diaz authored
It doesn't make sense to use the `-pedantic` flag when building the Trusted Firmware as we use GNU extensions and so our code is not fully ISO C compliant. This flag only makes sense if the code intends to be ISO C compliant. Change-Id: I6273564112759ff57f03b273f5349733a5f38aef Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 24 May, 2017 1 commit
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dp-arm authored
Change-Id: I92fd2fb920fcfc31bfcdadae787d8c84c5ca463b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 23 May, 2017 1 commit
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Masahiro Yamada authored
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 19 May, 2017 1 commit
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David Cunado authored
This Linaro release updates just the binaries: Linaro binaries upgraded 16.12 --> 17.01 The toolchain remains at 5.3-2015.05 (gcc 5.3) for both AArch64 and AArch32. The ARM TF codebase has been tested against these new binaries. This patch updates the User Guide to reflect that the 17.01 release is now a supported Linaro Release. Change-Id: I83c579dabd3fa9861ba0d41507036efbd87abcb5 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 05 May, 2017 1 commit
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David Cunado authored
AEMv8-A Model release v8.4 has been made available and Trusted Firmware has been tested against these versions as part of its CI system. This patch updates the user guide documentation to reflect the version of AEM and Cortex Models that Trusted Firmware has been tested against. Additionally, ARM FVPs FVP_Base_Cortex-A57x1-A53x1 and FVP_Base_Cortex-A57x2-A53x4 are removed from the list of tested FVPs as they are currently not being tested with the latest version of ARM Trusted Firmware. Also, documentation and links to Linaro pages have been updated to reflect the changes in the ARM community document hosting. Change-Id: Idae97303ce0929c82b137017de84ce94678f6f2b Signed-off-by: David Cunado <david.cunado@arm.com>
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- 20 Apr, 2017 1 commit
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Antonio Nino Diaz authored
The build option `ENABLE_ASSERTIONS` should be used instead. That way both C and ASM assertions can be enabled or disabled together. All occurrences of `ASM_ASSERTION` in common code and ARM platforms have been replaced by `ENABLE_ASSERTIONS`. ASM_ASSERTION has been removed from the user guide. Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 19 Apr, 2017 3 commits
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Antonio Nino Diaz authored
Add the new build option `ENABLE_ASSERTIONS` that controls whether or not assert functions are compiled out. It defaults to 1 for debug builds and to 0 for release builds. Additionally, a following patch will be done to allow this build option to hide auxiliary code used for the checks done in an `assert()`. This code is is currently under the DEBUG build flag. Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO, which is the default for debug builds. This patch also updates the User Guide. Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Soby Mathew authored
This patch introduces a build option to enable D-cache early on the CPU after warm boot. This is applicable for platforms which do not require interconnect programming to enable cache coherency (eg: single cluster platforms). If this option is enabled, then warm boot path enables D-caches immediately after enabling MMU. Fixes ARM-Software/tf-issues#456 Change-Id: I44c8787d116d7217837ced3bcf0b1d3441c8d80e Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Antonio Nino Diaz authored
ARM platforms have migrated to the translation tables library v2. However, for testing purposes, it can be useful to temporarily switch back to the old version. This patch introduces the option `ARM_XLAT_TABLES_LIB_V1`, that switches to v1 of the library when is set to 1. By default, it is 0, so that ARM platforms use the new version unless specifically stated. Updated User Guide. Change-Id: I53d3c8dd97706f6af9c6fca0364a88ef341efd31 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 31 Mar, 2017 1 commit
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Douglas Raillard authored
Introduce new build option ENABLE_STACK_PROTECTOR. It enables compilation of all BL images with one of the GCC -fstack-protector-* options. A new platform function plat_get_stack_protector_canary() is introduced. It returns a value that is used to initialize the canary for stack corruption detection. Returning a random value will prevent an attacker from predicting the value and greatly increase the effectiveness of the protection. A message is printed at the ERROR level when a stack corruption is detected. To be effective, the global data must be stored at an address lower than the base of the stacks. Failure to do so would allow an attacker to overwrite the canary as part of an attack which would void the protection. FVP implementation of plat_get_stack_protector_canary is weak as there is no real source of entropy on the FVP. It therefore relies on a timer's value, which could be predictable. Change-Id: Icaaee96392733b721fa7c86a81d03660d3c1bc06 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 29 Mar, 2017 1 commit
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David Cunado authored
This patch updates the User Guide to recommend the latest version of mbed TLS library to use with ARM Trusted Firmware. - Upgrade mbed TLS library: 2.2.1 -> 2.4.2 Change-Id: Ifb5386fec0673d6dbfdaa474233e397afc279c85
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- 27 Mar, 2017 1 commit
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Summer Qin authored
This patch modifies some of the functions in ARM platform layer to cater for the case when multi-threading `MT` is set in MPIDR. A new build flag `ARM_PLAT_MT` is added, and when enabled, the functions accessing MPIDR now assume that the `MT` bit is set for the platform and access the bit fields accordingly. Also, a new API plat_arm_get_cpu_pe_count is added when `ARM_PLAT_MT` is enabled, returning the PE count within the physical cpu corresponding to `mpidr`. Change-Id: I04ccf212ac3054a60882761f4087bae299af13cb Signed-off-by: Summer Qin <summer.qin@arm.com>
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- 02 Mar, 2017 2 commits
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Jeenu Viswambharan authored
The boolean build option HW_ASSISTED_COHERENCY is introduced to enable various optimizations in ARM Trusted Software, when built for such systems. It's set to 0 by default. Change-Id: I638390da6e1718fe024dcf5b402e07084f1eb014 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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Summer Qin authored
Now the TRUSTED_BOARD_BOOT is supported for AArch64 when LOAD_IMAGE_V2 is enabled. This patch updates the user-guide.md documentation for the same. Change-Id: I97de07435c81258c2a5f41a30a69736863a10bd1 Signed-off-by: Summer Qin <summer.qin@arm.com>
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- 14 Feb, 2017 1 commit
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Jeenu Viswambharan authored
The ARMv8v.1 architecture extension has introduced support for far atomics, which includes compare-and-swap. Compare and Swap instruction is only available for AArch64. Introduce build options to choose the architecture versions to target ARM Trusted Firmware: - ARM_ARCH_MAJOR: selects the major version of target ARM Architecture. Default value is 8. - ARM_ARCH_MINOR: selects the minor version of target ARM Architecture. Default value is 0. When: (ARM_ARCH_MAJOR > 8) || ((ARM_ARCH_MAJOR == 8) && (ARM_ARCH_MINOR >= 1)), for AArch64, Compare and Swap instruction is used to implement spin locks. Otherwise, the implementation falls back to using load-/store-exclusive instructions. Update user guide, and introduce a section in Firmware Design guide to summarize support for features introduced in ARMv8 Architecture Extensions. Change-Id: I73096a0039502f7aef9ec6ab3ae36680da033f16 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 13 Feb, 2017 2 commits
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David Cunado authored
This Linaro release updates both the binaries and the toolchain: Linaro binaries upgraded 16.06 --> 16.12 AArch64 compiler upgraded 15.05 (gcc 4.9) --> 5.3-2015.05 (gcc 5.3) AArch32 compiler upgraded 15.05 (gcc 4.9) --> 5.3-2015.05 (gcc 5.3) The ARM TF codebase has been tested against these new binaries. This patch updates the User Guide to reflect that the 16.12 release is now a supported Linaro Release. Change-Id: I6247e820f591df7d05df4f622ee45a3abf2c2d72 Signed-off-by: David Cunado <david.cunado@arm.com>
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dp-arm authored
This patch introduces the following three platform interfaces: * void plat_psci_stat_accounting_start(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting before entering a low power state. This typically involves capturing a timestamp. * void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting after exiting from a low power state. This typically involves capturing a timestamp. * u_register_t plat_psci_stat_get_residency(unsigned int lvl, const psci_power_state_t *state_info, unsigned int last_cpu_index) This is an optional hook that platforms can implement in order to calculate the PSCI stat residency. If any of these interfaces are overridden by the platform, it is recommended that all of them are. By default `ENABLE_PSCI_STAT` is disabled. If `ENABLE_PSCI_STAT` is set but `ENABLE_PMF` is not set then an alternative PSCI stat collection backend must be provided. If both are set, then default weak definitions of these functions are provided, using PMF to calculate the residency. NOTE: Previously, platforms did not have to explicitly set `ENABLE_PMF` since this was automatically done by the top-level Makefile. Change-Id: I17b47804dea68c77bc284df15ee1ccd66bc4b79b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 10 Feb, 2017 1 commit
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David Cunado authored
AEMv8-A Model release v8.2 has been made available and Trusted Firmware has been tested against these versions as part of its CI system. This patch updates the user guide documentation to reflect the version of AEM and Cortex Models that Trusted Firmware has been tested against. Also, the Linaro Release Notes link was broken and this patch updates the link. Change-Id: I88729cef909a69fff629036f480fd6168ad7dc9a Signed-off-by: David Cunado <david.cunado@arm.com>
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- 26 Jan, 2017 1 commit
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Jeenu Viswambharan authored
The current user guide mentions that Foundation model doesn't support debugger interface. Clarify that all FVPs support --cadi-server option such that a CADI-compliant debugger can connect to and control model execution. Also fix broken URL to FVP home page. Change-Id: Ia14d618a4e0abb4b228eb1616040f9b51fb3f6f9 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 15 Dec, 2016 1 commit
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David Cunado authored
Foundation Model release 10.2 has been made available and Trusted Firmware has been tested against that it as part of its CI system. This patch updates the user guide documentation to reflect the version of Foundation Model that Trusted Firmware has been tested against. Change-Id: I8571e1027b24892b41d04b93b24245a371ca2cae Signed-off-by: David Cunado <david.cunado@arm.com>
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- 13 Dec, 2016 1 commit
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Jeenu Viswambharan authored
Change-Id: I28b2790ff2f87b9fe3cf1020e59e1e0a00be6f97 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 22 Nov, 2016 1 commit
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Douglas Raillard authored
Add dependency information in the user guide for ARM_RECOM_STATE_ID_ENC that needs to be set when using PSCI_EXTENDED_STATE_ID on ARM platforms. Also clarify the build error message. Change-Id: Id125a0299b179f5f222bca4e2503204bf89a3c59 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 08 Nov, 2016 1 commit
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Jeenu Viswambharan authored
At present, build options in the user guide aren't listed in any specific order. Ordering them alphabetically is a standard practice, and is also easier on the reader. Contents unchanged. Change-Id: Ibc36f3a2a576edb86c1a402430d2ef5adcb2f144 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 03 Nov, 2016 1 commit
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dp-arm authored
Change-Id: I8e50df67e860b9589834445761a7b9927690fdce Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 13 Oct, 2016 1 commit
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David Cunado authored
Updated the user guide to clarify building FIP for AArch32. The instructions were previously specific to building a FIP for AArch64. Change-Id: I7bd1a6b8e810cfda411f707e04f479006817858e Signed-off-by: David Cunado <david.cunado@arm.com>
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- 12 Oct, 2016 1 commit
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Antonio Nino Diaz authored
The user guide incorrectly claimed that it is possible to load a bootwrapped kernel over JTAG on Juno in the same manner as an EL3 payload. In the EL3 payload boot flow, some of the platform initialisations in BL2 are modified. In particular, the TZC settings are modified to allow unrestricted access to DRAM. This in turn allows the debugger to access the DRAM and therefore to load the image there. In the BL33-preloaded boot flow though, BL2 uses the default TZC programming, which prevent access to most of the DRAM from secure state. When execution reaches the SPIN_ON_BL1_EXIT loop, the MMU is disabled and thus DS-5 presumably issues secure access transactions while trying to load the image, which fails. One way around it is to stop execution at the end of BL2 instead. At this point, the MMU is still enabled and the DRAM is mapped as non-secure memory. Therefore, the debugger is allowed to access this memory in this context and to sucessfully load the bootwrapped kernel in DRAM. The user guide is updated to suggest this alternative method. Co-Authored-By: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Dan Handley <dan.handley@arm.com> Change-Id: I537ea1c6d2f96edc06bc3f512e770c748bcabe94
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- 11 Oct, 2016 1 commit
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Soby Mathew authored
This patch adds necessary updates for building and running Trusted Firmware for AArch32 to user-guide.md. The instructions for running on both `FVP_Base_AEMv8A-AEMv8A` in AArch32 mode and `FVP_Base_Cortex-A32x4` models are added. The device tree files for AArch32 Linux kernel are also added in the `fdts` folder. Change-Id: I0023b6b03e05f32637cb5765fdeda8c8df2d0d3e
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- 27 Sep, 2016 1 commit
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Sandrine Bailleux authored
This patch updates the User Guide to recommend the latest version of some of the software dependencies of ARM Trusted Firmware. - Upgrade Linaro release: 16.02 -> 16.06 - Upgrade FVPs - Foundation v8 FVP: 9.5 -> 10.1 - Base FVPs: 7.6 -> 7.7 - Upgrade mbed TLS library: 2.2.0 -> 2.2.1 Note that the latest release of mbed TLS as of today is 2.3.0 but it has compilations issues with the set of library configuration options that Trusted Firmware uses. 2.2.1 is the next most recent release known to build with TF. This patch also fixes the markdown formatting of a link in the User Guide. Change-Id: Ieb7dd336f4d3110fba060afec4ad580ae707a8f1
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- 20 Sep, 2016 1 commit
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Yatharth Kochar authored
This patch adds capability to load BL images based on image descriptors instead of hard coded way of loading BL images. This framework is designed such that it can be readily adapted by any BL stage that needs to load images. In order to provide the above capability the following new platform functions are introduced: bl_load_info_t *plat_get_bl_image_load_info(void); This function returns pointer to the list of images that the platform has populated to load. bl_params_t *plat_get_next_bl_params(void); This function returns a pointer to the shared memory that the platform has kept aside to pass trusted firmware related information that next BL image needs. void plat_flush_next_bl_params(void); This function flushes to main memory all the params that are passed to next image. int bl2_plat_handle_post_image_load(unsigned int image_id) This function can be used by the platforms to update/use image information for given `image_id`. `desc_image_load.c` contains utility functions which can be used by the platforms to generate, load and executable, image list based on the registered image descriptors. This patch also adds new version of `load_image/load_auth_image` functions in-order to achieve the above capability. Following are the changes for the new version as compared to old: - Refactor the signature and only keep image_id and image_info_t arguments. Removed image_base argument as it is already passed through image_info_t. Given that the BL image base addresses and limit/size are already provided by the platforms, the meminfo_t and entry_point_info arguments are not needed to provide/reserve the extent of free memory for the given BL image. - Added check for the image size against the defined max size. This is needed because the image size could come from an unauthenticated source (e.g. the FIP header). To make this check, new member is added to the image_info_t struct for identifying the image maximum size. New flag `LOAD_IMAGE_V2` is added in the Makefile. Default value is 0. NOTE: `TRUSTED_BOARD_BOOT` is currently not supported when `LOAD_IMAGE_V2` is enabled. Change-Id: Ia7b643f4817a170d5a2fbf479b9bc12e63112e79
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- 12 Sep, 2016 1 commit
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dp-arm authored
This feature allows one to quickly verify that the expected image is contained in the FIP without extracting the image and running sha256sum(1) on it. The sha256 digest is only shown when the verbose flag is used. This change requires libssl-dev to be installed in order to build Trusted Firmware. Previously, libssl-dev was optionally needed only to support Trusted Board Boot configurations. Fixes ARM-Software/tf-issues#124 Change-Id: Ifb1408d17f483d482bb270a589ee74add25ec5a6
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- 16 Aug, 2016 1 commit
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Sandrine Bailleux authored
This patch updates the User Guide to move up from version 7.2 to 7.6 of the Base FVP. Change-Id: I792b2250deb4836266e14b40992ae59a5ab5f729
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- 15 Aug, 2016 1 commit
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Soby Mathew authored
This patch enables the AArch32 build including SP_MIN in the top level Makefile. The build flag `ARCH` now can specify either `aarch64`(default) or `aarch32`. Currently only FVP AEM model is supported for AArch32 build. Another new build flag `AARCH32_SP` is introduced to specify the AArch32 secure payload to be built. Change-Id: Ie1198cb9e52d7da1b79b93243338fc3868b08faa
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- 29 Jul, 2016 1 commit
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dp-arm authored
fiptool provides a more consistent and intuitive interface compared to the fip_create program. It serves as a better base to build on more features in the future. fiptool supports various subcommands. Below are the currently supported subcommands: 1) info - List the images contained in a FIP file. 2) create - Create a new FIP file with the given images. 3) update - Update an existing FIP with the given images. 4) unpack - Extract a selected set or all the images from a FIP file. 5) remove - Remove images from a FIP file. This is a new command that was not present in fip_create. To create a new FIP file, replace "fip_create" with "fiptool create". To update a FIP file, replace "fip_create" with "fiptool update". To dump the contents of a FIP file, replace "fip_create --dump" with "fiptool info". A compatibility script that emulates the basic functionality of fip_create is provided. Existing scripts might or might not work with the compatibility script. Users are strongly encouraged to migrate to fiptool. Fixes ARM-Software/tf-issues#87 Fixes ARM-Software/tf-issues#108 Fixes ARM-Software/tf-issues#361 Change-Id: I7ee4da7ac60179cc83cf46af890fd8bc61a53330
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- 28 Jul, 2016 1 commit
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Sandrine Bailleux authored
This patch documents the effect, cost and benefits of the SEPARATE_CODE_AND_RODATA build flag. Change-Id: Ic8daf0563fa6335930ad6c70b9c35f678e84d39d
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- 25 Jul, 2016 1 commit
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Antonio Nino Diaz authored
Compile option `ARM_BOARD_OPTIMISE_MMAP` has been renamed to `ARM_BOARD_OPTIMISE_MEM` because it now applies not only to defines related to the translation tables but to the image size as well. The defines `PLAT_ARM_MAX_BL1_RW_SIZE`, `PLAT_ARM_MAX_BL2_SIZE` and `PLAT_ARM_MAX_BL31_SIZE` have been moved to the file board_arm_def.h. This way, ARM platforms no longer have to set their own values if `ARM_BOARD_OPTIMISE_MEM=0` and they can specify optimized values otherwise. The common sizes have been set to the highest values used for any of the current build configurations. This is needed because in some build configurations some images are running out of space. This way there is a common set of values known to work for all of them and it can be optimized for each particular platform if needed. The space reserved for BL2 when `TRUSTED_BOARD_BOOT=0` has been increased. This is needed because when memory optimisations are disabled the values for Juno of `PLAT_ARM_MMAP_ENTRIES` and `MAX_XLAT_TABLES` are higher. If in this situation the code is compiled in debug mode and with "-O0", the code won't fit. Change-Id: I70a3d8d3a0b0cad1d6b602c01a7ea334776e718e
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- 16 Jun, 2016 2 commits
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Yatharth Kochar authored
This patch adds following optional PSCI STAT functions: - PSCI_STAT_RESIDENCY: This call returns the amount of time spent in power_state in microseconds, by the node represented by the `target_cpu` and the highest level of `power_state`. - PSCI_STAT_COUNT: This call returns the number of times a `power_state` has been used by the node represented by the `target_cpu` and the highest power level of `power_state`. These APIs provides residency statistics for power states that has been used by the platform. They are implemented according to v1.0 of the PSCI specification. By default this optional feature is disabled in the PSCI implementation. To enable it, set the boolean flag `ENABLE_PSCI_STAT` to 1. This also sets `ENABLE_PMF` to 1. Change-Id: Ie62e9d37d6d416ccb1813acd7f616d1ddd3e8aff
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Yatharth Kochar authored
This patch adds Performance Measurement Framework(PMF) in the ARM Trusted Firmware. PMF is implemented as a library and the SMC interface is provided through ARM SiP service. The PMF provides capturing, storing, dumping and retrieving the time-stamps, by enabling the development of services by different providers, that can be easily integrated into ARM Trusted Firmware. The PMF capture and retrieval APIs can also do appropriate cache maintenance operations to the timestamp memory when the caller indicates so. `pmf_main.c` consists of core functions that implement service registration, initialization, storing, dumping and retrieving the time-stamp. `pmf_smc.c` consists SMC handling for registered PMF services. `pmf.h` consists of the macros that can be used by the PMF service providers to register service and declare time-stamp functions. `pmf_helpers.h` consists of internal macros that are used by `pmf.h` By default this feature is disabled in the ARM trusted firmware. To enable it set the boolean flag `ENABLE_PMF` to 1. NOTE: The caller is responsible for specifying the appropriate cache maintenance flags and for acquiring/releasing appropriate locks before/after capturing/retrieving the time-stamps. Change-Id: Ib45219ac07c2a81b9726ef6bd9c190cc55e81854
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- 03 Jun, 2016 1 commit
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Soby Mathew authored
The system registers that are saved and restored in CPU context include AArch32 systems registers like SPSR_ABT, SPSR_UND, SPSR_IRQ, SPSR_FIQ, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2. Accessing these registers on an AArch64-only (i.e. on hardware that does not implement AArch32, or at least not at EL1 and higher ELs) platform leads to an exception. This patch introduces the build option `CTX_INCLUDE_AARCH32_REGS` to specify whether to include these AArch32 systems registers in the cpu context or not. By default this build option is set to 1 to ensure compatibility. AArch64-only platforms must set it to 0. A runtime check is added in BL1 and BL31 cold boot path to verify this. Fixes ARM-software/tf-issues#386 Change-Id: I720cdbd7ed7f7d8516635a2ec80d025f478b95ee
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- 25 May, 2016 1 commit
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Soby Mathew authored
This patch adds support to select CCN driver for FVP during build. A new build option `FVP_INTERCONNECT_DRIVER` is added to allow selection between the CCI and CCN driver. Currently only the CCN-502 variant is supported on FVP. The common ARM CCN platform helper file now verifies the cluster count declared by platform is equal to the number of root node masters exported by the ARM Standard platform. Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a
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- 20 May, 2016 1 commit
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Antonio Nino Diaz authored
Added a build flag to select the generic delay timer on FVP instead of the SP804 timer. By default, the generic one will be selected. The user guide has been updated. Change-Id: Ica34425c6d4ed95a187b529c612f6d3b26b78bc6
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