1. 09 Feb, 2018 1 commit
    • Santeri Salko's avatar
      qemu: Fix interrupt type check · 53a98be3
      Santeri Salko authored
      
      
      Function plat_ic_get_pending_interrupt_type() should return interrupt
      type, not id. The function is used in aarch64 exception handling and
      currently the irq/fiq forwarding fails if a secure interrupt happens while
      running normal world.
      
      The qemu-specific gic file does not contain any extra functionality so it
      can be removed and common file can be used instead.
      
      fixes arm-software/tf-issues#546
      Signed-off-by: default avatarSanteri Salko <santeri.salko@gmail.com>
      53a98be3
  2. 01 Feb, 2018 3 commits
  3. 19 Jan, 2018 1 commit
    • Julius Werner's avatar
      Add default crash console code to hook up to new console API · 17cd67d2
      Julius Werner authored
      
      
      This patch expands the weak stubs for the plat_crash_console_xxx
      functions in common platform code to use the new console API for crash
      output. This should make crash console output "just work" for most cases
      without the need for the platform to explicitly set up a crash console.
      For cases where the normal console framework doesn't work (e.g. very
      early crashes, before the platform can register any consoles), platforms
      are still able to override the functions just like before.
      
      This feature requires the MULTI_CONSOLE_API compile-time flag to work.
      For builds which don't have it set, this patch has no practical effect.
      
      Change-Id: I80dd161cb43f9db59a0bad2dae33c6560cfac584
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      17cd67d2
  4. 18 Jan, 2018 1 commit
    • Roberto Vargas's avatar
      bl2-el3: Add BL2_EL3 image · b1d27b48
      Roberto Vargas authored
      
      
      This patch enables BL2 to execute at the highest exception level
      without any dependancy on TF BL1. This enables platforms which already
      have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL
      stages without need for BL1.  This is not currently possible because
      BL2 executes at S-EL1 and cannot jump straight to EL3.
      
      Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      b1d27b48
  5. 12 Dec, 2017 1 commit
    • Julius Werner's avatar
      Add new function-pointer-based console API · 9536bae6
      Julius Werner authored
      
      
      This patch overhauls the console API to allow for multiple console
      instances of different drivers that are active at the same time. Instead
      of binding to well-known function names (like console_core_init),
      consoles now provide a register function (e.g. console_16550_register())
      that will hook them into the list of active consoles. All console
      operations will be dispatched to all consoles currently in the list.
      
      The new API will be selected by the build-time option MULTI_CONSOLE_API,
      which defaults to ${ERROR_DEPRECATED} for now. The old console API code
      will be retained to stay backwards-compatible to older platforms, but
      should no longer be used for any newly added platforms and can hopefully
      be removed at some point in the future.
      
      The new console API is intended to be used for both normal (bootup) and
      crash use cases, freeing platforms of the need to set up the crash
      console separately. Consoles can be individually configured to be active
      active at boot (until first handoff to EL2), at runtime (after first
      handoff to EL2), and/or after a crash. Console drivers should set a sane
      default upon registration that can be overridden with the
      console_set_scope() call. Code to hook up the crash reporting mechanism
      to this framework will be added with a later patch.
      
      This patch only affects AArch64, but the new API could easily be ported
      to AArch32 as well if desired.
      
      Change-Id: I35c5aa2cb3f719cfddd15565eb13c7cde4162549
      Signed-off-by: default avatarJulius Werner <jwerner@chromium.org>
      9536bae6
  6. 13 Nov, 2017 2 commits
  7. 08 Nov, 2017 1 commit
  8. 03 Nov, 2017 1 commit
    • Soby Mathew's avatar
      Fix PSCI STAT time stamp collection · bfc87a8d
      Soby Mathew authored
      
      
      This patch includes various fixes for PSCI STAT functionality
      relating to timestamp collection:
      
      1. The PSCI stat accounting for retention states for higher level
      power domains were done outside the locks which could lead to
      spurious values in some race conditions. This is moved inside
      the locks. Also, the call to start the stat accounting was redundant
      which is now removed.
      
      2. The timestamp wrap-around case when calculating residency did
      not cater for AArch32. This is now fixed.
      
      3. In the warm boot path, `plat_psci_stat_accounting_stop()` was
      getting invoked prior to population of target power states. This
      is now corrected.
      
      Change-Id: I851526455304fb74ff0a724f4d5318cd89e19589
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      bfc87a8d
  9. 24 Oct, 2017 1 commit
  10. 16 Oct, 2017 10 commits
  11. 11 Sep, 2017 1 commit
    • Soby Mathew's avatar
      Implement log framework · 7f56e9a3
      Soby Mathew authored
      
      
      This patch gives users control over logging messages printed from the C
      code using the LOG macros defined in debug.h Users now have the ability
      to reduce the log_level at run time using the tf_log_set_max_level()
      function. The default prefix string can be defined by platform by
      overriding the `plat_log_get_prefix()` platform API which is also
      introduced in this patch.
      
      The new log framework results in saving of some RO data. For example,
      when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted
      in saving 384 bytes of RO data and increase of 8 bytes of RW data. The
      framework also adds about 108 bytes of code to the release build of FVP.
      
      Fixes ARM-software/tf-issues#462
      
      Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554
      Co-authored-by: default avatarEleanor Bonnici <Eleanor.bonnici@arm.com>
      Signed-off-by: default avatarSoby Mathew <soby.mathew@arm.com>
      7f56e9a3
  12. 01 Aug, 2017 1 commit
  13. 20 Jun, 2017 1 commit
  14. 23 May, 2017 1 commit
    • Masahiro Yamada's avatar
      cert: move platform_oid.h to include/tools_share for all platforms · bb41eb7a
      Masahiro Yamada authored
      
      
      Platforms aligned with TBBR are supposed to use their own OIDs, but
      defining the same macros with different OIDs does not provide any
      value (at least technically).
      
      For easier use of TBBR, this commit allows platforms to reuse the OIDs
      obtained by ARM Ltd.  This will be useful for non-ARM vendors that
      do not need their own extension fields in their certificate files.
      
      The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h
      
      Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by
      defining USE_TBBR_DEFS as 1.  USE_TBBR_DEFS is 0 by default to keep the
      backward compatibility.
      
      For clarification, I inserted a blank line between headers from the
      include/ directory (#include <...>) and ones from a local directory
      (#include "..." ).
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      bb41eb7a
  15. 03 May, 2017 1 commit
  16. 20 Apr, 2017 1 commit
    • Antonio Nino Diaz's avatar
      Remove build option `ASM_ASSERTION` · 044bb2fa
      Antonio Nino Diaz authored
      
      
      The build option `ENABLE_ASSERTIONS` should be used instead. That way
      both C and ASM assertions can be enabled or disabled together.
      
      All occurrences of `ASM_ASSERTION` in common code and ARM platforms have
      been replaced by `ENABLE_ASSERTIONS`.
      
      ASM_ASSERTION has been removed from the user guide.
      
      Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f
      Signed-off-by: default avatarAntonio Nino Diaz <antonio.ninodiaz@arm.com>
      044bb2fa
  17. 31 Mar, 2017 1 commit
  18. 20 Mar, 2017 1 commit
  19. 08 Mar, 2017 1 commit
  20. 02 Mar, 2017 1 commit
  21. 13 Feb, 2017 1 commit
    • dp-arm's avatar
      PSCI: Decouple PSCI stat residency calculation from PMF · 04c1db1e
      dp-arm authored
      
      
      This patch introduces the following three platform interfaces:
      
      * void plat_psci_stat_accounting_start(const psci_power_state_t *state_info)
      
        This is an optional hook that platforms can implement in order
        to perform accounting before entering a low power state.  This
        typically involves capturing a timestamp.
      
      * void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info)
      
        This is an optional hook that platforms can implement in order
        to perform accounting after exiting from a low power state.  This
        typically involves capturing a timestamp.
      
      * u_register_t plat_psci_stat_get_residency(unsigned int lvl,
      	const psci_power_state_t *state_info,
      	unsigned int last_cpu_index)
      
        This is an optional hook that platforms can implement in order
        to calculate the PSCI stat residency.
      
      If any of these interfaces are overridden by the platform, it is
      recommended that all of them are.
      
      By default `ENABLE_PSCI_STAT` is disabled.  If `ENABLE_PSCI_STAT`
      is set but `ENABLE_PMF` is not set then an alternative PSCI stat
      collection backend must be provided.  If both are set, then default
      weak definitions of these functions are provided, using PMF to
      calculate the residency.
      
      NOTE: Previously, platforms did not have to explicitly set
      `ENABLE_PMF` since this was automatically done by the top-level
      Makefile.
      
      Change-Id: I17b47804dea68c77bc284df15ee1ccd66bc4b79b
      Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
      04c1db1e
  22. 31 Jan, 2017 1 commit
  23. 23 Jan, 2017 1 commit
    • Masahiro Yamada's avatar
      Use #ifdef for IMAGE_BL* instead of #if · 3d8256b2
      Masahiro Yamada authored
      
      
      One nasty part of ATF is some of boolean macros are always defined
      as 1 or 0, and the rest of them are only defined under certain
      conditions.
      
      For the former group, "#if FOO" or "#if !FOO" must be used because
      "#ifdef FOO" is always true.  (Options passed by $(call add_define,)
      are the cases.)
      
      For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
      checking the value of an undefined macro is strange.
      
      Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like
      follows:
      
        $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
      
        $(OBJ): $(2)
                @echo "  CC      $$<"
                $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@
      
      This means, IMAGE_BL* is defined when building the corresponding
      image, but *undefined* for the other images.
      
      So, IMAGE_BL* belongs to the latter group where we should use #ifdef
      or #ifndef.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      3d8256b2
  24. 15 Dec, 2016 1 commit
    • dp-arm's avatar
      tbbr: Fix updating of Non-Trusted NV counter · d35dee23
      dp-arm authored
      
      
      The previous code required that a certificate be signed with the ROT
      key before the platform's NV counter could be updated with the value
      in the certificate.  This implies that the Non-Trusted NV counter was
      not being updated for Non-Trusted content certificates, as they cannot
      be signed with the ROT key in the TBBR CoT scheme.
      
      The code is reworked to only allow updating the platform's Trusted NV
      counter when a certificate protected by the Trusted NV counter is
      signed with the ROT key.
      
      Content certificates protected by the Non-Trusted NV counter are
      allowed to update the platform's Non-Trusted NV counter, assuming
      that the certificate value is higher than the platform's value.
      
      A new optional platform API has been introduced, named
      plat_set_nv_ctr2().  Platforms may choose to implement it and perform
      additional checks based on the authentication image descriptor before
      modifying the NV counters.  A default weak implementation is available
      that just calls into plat_set_nv_ctr().
      
      Fixes ARM-software/tf-issues#426
      
      Change-Id: I4fc978fd28a3007bc0cef972ff1f69ad0413b79c
      Signed-off-by: default avatardp-arm <dimitris.papastamos@arm.com>
      d35dee23
  25. 01 Dec, 2016 1 commit
    • Yatharth Kochar's avatar
      AArch32: Miscellaneous fixes in the AArch32 code · 69d59e0c
      Yatharth Kochar authored
      
      
      This patch makes following miscellaneous fixes:
      * pl011_console.S: Fixed the bit mask used to check if the
        transmit FIFO is full or empty.
      * smcc_macros.S: Added `_fsxc` suffix while updating the SPSR.
        By default the assembler assumes `_fc` suffix which does not
        update all the fields in SPSR. By adding `_fsxc` suffix all
        the fields gets updated.
      * platform_helpers.S: Removed the weak definition for
        `plat_my_core_pos()` as this is a mandatory function which
        needs to be defined by all platforms.
      
      Change-Id: I8302292533c943686fff8d7c749a07132c052a3b
      Signed-off-by: default avatarYatharth Kochar <yatharth.kochar@arm.com>
      69d59e0c
  26. 24 Oct, 2016 1 commit
  27. 21 Sep, 2016 1 commit
    • Yatharth Kochar's avatar
      AArch32: Common changes needed for BL1/BL2 · 1a0a3f06
      Yatharth Kochar authored
      This patch adds common changes to support AArch32 state in
      BL1 and BL2. Following are the changes:
      
      * Added functions for disabling MMU from Secure state.
      * Added AArch32 specific SMC function.
      * Added semihosting support.
      * Added reporting of unhandled exceptions.
      * Added uniprocessor stack support.
      * Added `el3_entrypoint_common` macro that can be
        shared by BL1 and BL32 (SP_MIN) BL stages. The
        `el3_entrypoint_common` is similar to the AArch64
        counterpart with the main difference in the assembly
        instructions and the registers that are relevant to
        AArch32 execution state.
      * Enabled `LOAD_IMAGE_V2` flag in Makefile for
        `ARCH=aarch32` and added check to make sure that
        platform has not overridden to disable it.
      
      Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
      1a0a3f06
  28. 19 Aug, 2016 1 commit
    • Sandrine Bailleux's avatar
      Add WFI in platform's unexpected error handlers · 8c9e1af0
      Sandrine Bailleux authored
      This patch adds a WFI instruction in the default implementations of
      plat_error_handler() and plat_panic_handler(). This potentially reduces
      power consumption by allowing the hardware to enter a low-power state.
      The same change has been made to the FVP and Juno platform ports.
      
      Change-Id: Ia4e6e1e5bf1ed42efbba7d0ebbad7be8d5f9f173
      8c9e1af0