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  1. 25 Apr, 2019 9 commits
    • Heiko Stuebner's avatar
      rockchip: document platform · 55617251
      Heiko Stuebner authored 
      

This adds a rockchip.rst to docs/plat documenting the general
approach to using the Rockchip ATF platforms together with the
supported bootloaders and also adds myself as maintainer after
making sure Tony Xie is ok with that.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: Idce53d15eff4ac6de05bbb35d86e57ed50d0cbb9
      55617251
    • Heiko Stuebner's avatar
      rockchip: add support for rk3288 · 780e3f24
      Heiko Stuebner authored 
      

The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
with later SoCs.

Working features are general non-secure mode (the gic needs special
love for that), psci-based smp bringing cpu cores online and also
taking them offline again, psci-based suspend (the simpler variant
also included in the linux kernel, deeper suspend following later)
and I was also already able to test HYP-mode and was able to boot
a virtual kernel using kvm.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a
      780e3f24
    • Heiko Stuebner's avatar
      rockchip: add common aarch32 support · 82e18f89
      Heiko Stuebner authored 
      

There are a number or ARMv7 Rockchip SoCs that are very similar in their
bringup routines to the existing arm64 SoCs, so there is quite a high
commonality possible here.

Things like virtualization also need psci and hyp-mode and instead of
trying to cram this into bootloaders like u-boot, barebox or coreboot
(all used in the field), re-use the existing infrastructure in TF-A
for this (both Rockchip plat support and armv7 support in general).

So add core support for aarch32 Rockchip SoCs, with actual soc support
following in a separate patch.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b
      82e18f89
    • Heiko Stuebner's avatar
      rockchip: rk3328: drop double declaration of entry_point storage · 48bea0f3
      Heiko Stuebner authored 
      

The cpuson_entry_point and cpuson_flags are already declared in
plat_private.h so there is no need to have it again declared in
the local pmu.h, especially as it may cause conflicts when the
other type changes.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I80ae0e23d22f67109ed96f8ac059973b6de2ce87
      48bea0f3
    • Heiko Stuebner's avatar
      rockchip: Allow socs with undefined wfe check bits · 3b5b888d
      Heiko Stuebner authored 
      

Some older socs like the rk3288 do not have the necessary registers
to check the wfi/wfe state of the cpu cores. Allow this case an "just"
do an additional delay similar to how the Linux kernel handles smp
right now.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I0f67af388b06b8bfb4a9bac411b4900ac266a77a
      3b5b888d
    • Heiko Stuebner's avatar
      rockchip: move pmusram assembler code to a aarch64 subdir · c3aaabaf
      Heiko Stuebner authored 
      

The current code doing power-management from sram is highly
arm64-specific so should live in a corresponding subdirectory
and not in the common area.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9
      c3aaabaf
    • Heiko Stuebner's avatar
      sp_min: allow inclusion of a platform-specific linker script · 14e09cc4
      Heiko Stuebner authored 
      

Similar to bl31 allow sp_min to also include a platform-specific
linker script. This allows for example to place specific code in
other memories of the system, like resume code in sram, while the
main tf-a lives in ddr.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I67642f7bfca036b5d51eb0fa092b479a647a9cc1
      14e09cc4
    • Heiko Stuebner's avatar
      sp_min: make sp_min_warm_entrypoint public · d4c98a1b
      Heiko Stuebner authored 
      

Similar to bl31_warm_entrypoint, sp_min-based platforms may need
that for special resume handling.

Therefore move it from the private header to the sp_min platform header.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I40d9eb3ff77cff88d47c1ff51d53d9b2512cbd3e
      d4c98a1b
    • Heiko Stuebner's avatar
      drivers: ti: uart: add a aarch32 variant · 6f78eb5c
      Heiko Stuebner authored 
      

Rockchip re-uses the ti uart console driver and for aarch32 needs a
specific variant, so add it.
There are also aarch32 ti socs, so it may be useful for them as well
at some point.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Change-Id: I31ede7cc7b10347b3691cff051db2b985fd59e17
      6f78eb5c
  3. 24 Apr, 2019 5 commits
  5. 23 Apr, 2019 12 commits
  7. 19 Apr, 2019 4 commits
  9. 18 Apr, 2019 2 commits
  11. 17 Apr, 2019 5 commits
  13. 16 Apr, 2019 1 commit
  15. 12 Apr, 2019 2 commits