- 29 Jan, 2021 4 commits
-
-
Pali Rohár authored
This removes need to move files and also allows to build uart and flash images in parallel. Signed-off-by:
Pali Rohár <pali@kernel.org> Change-Id: I13bea547d7849615e1c1e11d333c8c99e568d3f6
-
Pali Rohár authored
Currently a3700_common.mk makefile builds intermediate files in TF-A top level directory and also outside of the TF-A tree. This change fixes this issue and builds all intermediate files in $(BUILD_PLAT) directory. Part of this change is also removal of 'rm' and 'mv' commands as there is no need to remove or move intermediate files from outside of the TF-A build tree. Signed-off-by:
Pali Rohár <pali@kernel.org> Change-Id: I72e3a3024bd3fdba1b991a220184d750029491e9
-
Pali Rohár authored
When building WTMI image we need to correctly set DDR_TOPOLOGY and CLOCKSPRESET variables which WTMI build system expect. Otherwise it use default values. Signed-off-by:
Pali Rohár <pali@kernel.org> Change-Id: Ib83002194c8a6c64a2014899ac049bd319e1652f
-
Pali Rohár authored
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory paths to pre-compiled Crypto++ library and header files. When both new parameters are specified then the source code of Crypto++ via CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build process to use system Crypto++ library. Signed-off-by:
Pali Rohár <pali@kernel.org> Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b
-
- 28 Jan, 2021 1 commit
-
-
Pali Rohár authored
plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined These variables must contain a path to a valid directory (not a file) which really exists. Also WTP and MV_DDR_PATH must point to either a valid Marvell release tarball or git repository. Signed-off-by:
Pali Rohár <pali@kernel.org> Change-Id: I1ad80c41092cf3ea6a625426df62b7d9d6f37815
-
- 22 Jan, 2021 1 commit
-
-
Yann Gautier authored
The base address of UART peripheral should be given in R0, not in R1. Otherwise the console_stm32_core_flush issues an assert message. This issue was highlighted with recent changes in console flush functions. Change-Id: Iead01986fdbbf30ad2fd9fa515a1d2b611b4e591 Signed-off-by:
Yann Gautier <yann.gautier@st.com>
-
- 20 Jan, 2021 4 commits
-
-
Ming Huang authored
Violation of MISRA-C Rule 14.4 Signed-off-by:
Ming Huang <huangming@linux.alibaba.com> Change-Id: I44ef50dadb54fb056a91f3de962b6e63ba6d7ac4
-
Ming Huang authored
The issue is that, when interrupt is triggered and RAS handler is entered, after interrupt handler finishes, TF-A will re-enter bl32 and then crash. sdei_dispatch_event() may return failing result in some cases, for example kernel may not have registered a handler or RAS event may happen early during boot. We restore the NS context when sdei_dispatch_event() returns failing result. error log : Received delegated event X0 : 0xC4000061 X1 : 0x0 X2 : 0x0 X3 : 0x0 Received event - 0xC4000061 on cpu 0 UnRecognized Event - 0xC4000061 Failed delegated event 0xC4000061, Status Invalid Parameter Unhandled Exception in EL3. x30 = 0x000000000401f700 x0 = 0xfffffffffffffffe x1 = 0xfffffffffffffffe x2 = 0x00000000600003c0 Signed-off-by:
Ming Huang <huangming@linux.alibaba.com> Change-Id: I9802e9a32eee0ac3b5a8bcc0362d0b0e3b71dc9f
-
Jagadeesh Ujja authored
Turn ON/OFF GIC redistributor in sync with GIC CPU interface ON/OFF. Issue : The Linux prompt hangs when all the cores in a cluster are turned OFF and we try to turn ON a core in that cluster. Previously when TF-A turns ON a core, TF-A first turns ON the redistributor followed by the core. This did not match the flow when turning OFF a core, as TF-A did not turn OFF redistributor when the corresponding core[s] are disabled. This hang is resolved by disabling redistributor as cores are disabled, keeping them in sync. Signed-off-by:
Jagadeesh Ujja <jagadeesh.ujja@arm.com> Change-Id: Ifd04fdcfd47b45e00f874f15b098471883d023f0
-
Rajan Vaja authored
Some switch cases uses same operation. So, club switch cases which uses same operation and remove duplicate code. Signed-off-by:
Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I260b474c0ff3f2ca102c32d4af2e4abba2b8f57c
-
- 19 Jan, 2021 4 commits
-
-
Graeme Gregory authored
This allows PSCI in TF-A to signal platform power states to QEMU via a controller in secure space. This required a sbsa-ref specific version of PSCI functions for the platform. Also adjusted the MMU range to also include the new EC. Add a new MMU region for the embedded controller and increase the size of xlat tables by one for the new region. Signed-off-by:
Graeme Gregory <graeme@nuviainc.com> Change-Id: Iece8a88947f11e82ab8988e460a8a66ad175a5ee
-
Graeme Gregory authored
sbsa-ref in QEMU creates clusers of 8 cores, it may create up to 512 cores in upto 64 clusters. Implement a qemu_sbsa specific topology file and increase the BL31_SIZE to accommodate the bigger table sizes. Change platform_def.h for new topology. Correct PLATFORM_CPU_PER_CLUSTER_SHIFT so plat_helpers.S calculates correct result. Signed-off-by:
Graeme Gregory <graeme@nuviainc.com> Change-Id: Idc5d70394c0956b759ad2c86f9fda8f293f2cfa7
-
Graeme Gregory authored
DEVICE2 is not currently used on qemu platform but is needed for a future patch for qemu_sbsa platform. Change its definition to RW and add it to all levels of arm-tf similar to DEVICE1 definition. Signed-off-by:
Graeme Gregory <graeme@nuviainc.com> Change-Id: I03495471bfd423b61ad44ec4953fb25f76aa54bf
-
Graeme Gregory authored
Rather than re-create this file in multiple qemu variants instead caclulate the shift needed to convert MPIDR to position. Add a new PLATFORM_CPU_PER_CLUSTER_SHIFT define in platform_def.h for both qemu and qemu_sbsa to enable this calculation. Signed-off-by:
Graeme Gregory <graeme@nuviainc.com> Change-Id: I0e3a86354aa716d95150a3a34b15287cd70c8fd2
-
- 13 Jan, 2021 25 commits
-
-
Biju Das authored
Add DT node support for channel 0 where physical memory is split between 32bit space and 64bit space. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I99a18dbb14cdb54100a836c16445242e430794e3
-
Biju Das authored
The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I3ed55aa4a2cc5c9d9cd6440e087bcd93186520c7
-
Biju Das authored
Include header ulcb_cpld.h in plat_pm.c only if RCAR_GEN3_ULCB is enabled. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ie89223097c608265c50e32778e8df28feed82480
-
Biju Das authored
Move rcar plat code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I1001bea1a8a9232a03ddbf6931ca3c764ba1e181
-
Biju Das authored
Move plat aarch64 code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I66265e5e68bfcf5c3534965fb3549a145c782b47
-
Biju Das authored
Move DDR/QoS/PFC header files, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I2cc0ceda8d05b6b8d95a69afdc233dc0d098e850
-
Biju Das authored
Move rpc driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I04805d720d95b8edcc14e652f897fadc7f432197
-
Biju Das authored
Move avs driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I85d9fa8b6abf158ce2521f1696478f7c5339fc42
-
Biju Das authored
Move authentication driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I02592dfc714998bf89b9feaa78f685ae36be6f59
-
Biju Das authored
Move dma driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Idce2e2f4e098cfc17219f963373d20ebf74e5b7c
-
Biju Das authored
Move watch driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I235f2cde325a0feeadbfc4b7ee02e8b1186f7ea1
-
Biju Das authored
Move plat common sources to common directory, so that same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Id2b1822c97cc50e3febaffc2e5f42b4d53809a17
-
Biju Das authored
Move rom driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I399dfb5eff186db76d26fa9c54bea88bee66789c
-
Biju Das authored
Create a common directory and move the header and assembly files so that the common code can be used by both Renesas R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ia9a563a1c3c9f8c6f0d3cb82622deb2e155d7f6c
-
Biju Das authored
Move delay driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I5e806bd0e0a0a4b436048513b7089db90ff9805f
-
Biju Das authored
This patch fixes checkpatch warnings and replaces TAB with space after #define macros. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I11f65d494997cbf612376fb120c27ef0166cdd3a
-
Biju Das authored
Move console/scif driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I0b15e4f4ffaaa99e77bcee32b1dad648eeadcd9b
-
Biju Das authored
Fix checkpatch warnings. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: If9318a5113fbd6ae8b5c4bfb409da9e393673258
-
Biju Das authored
Move pwrc driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I75d91a44d872fe2296b15c700efacd5721385363
-
Biju Das authored
Fix checkpatch warnings. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I46801b563c887dc0a66e224ab4971e6503641529
-
Biju Das authored
Move io driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ic661e415c91a1fbfd5eee3bba86466037e51574b
-
Biju Das authored
Sort the header includes alphabetically, fix typos and drop unneeded TAB and replace it with space Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ieff84434877f58ec26c8351611059ad4e11a4e28
-
Biju Das authored
Move eMMC driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I7f3055709337327d1a1c9f563c14ad1626adb355
-
Biju Das authored
Sort the header includes alphabetically and fix checkpatch warnings. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I08fd0d12ee1d8d61391e8afc33f8c67fcf70c4e5
-
Masahisa Kojima authored
This implements support for UEFI secure variable storage using standalone MM framework on qemu_sbsa platform. Non-secure shared memory between UEFI and standalone MM is allocated at the top of DRAM. DRAM size of qemu_sbsa varies depends on the QEMU parameter, so the non-secure shared memory is allocated by trusted firmware and passed the base address and size to UEFI through device tree "/reserved-memory" node. Change-Id: I367191f408eb9850b7ec7761ee346b014c539767 Signed-off-by:
Masahisa Kojima <masahisa.kojima@linaro.org>
-
- 12 Jan, 2021 1 commit
-
-
Will Wong authored
Add ability to support PS and System reset after idling the APU, by reading the restart scope from the PMU. Signed-off-by:
Will Wong <willw@xilinx.com> Signed-off-by:
Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I23c01725d8ebb71ad34be02ab204411b93620702
-