1. 23 Jul, 2021 1 commit
    • Ming Huang's avatar
      fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif · 5a5e0aac
      Ming Huang authored
      
      
      A RAS error may be triggered while offline core in OS. Error:
      Uncorrected software error in the Distributor, with IERR=9,SERR=f.
      Core put to sleep before its Group enables were cleared.
      
      gicv3_cpuif_disable() will be called in offline core flow.
      According to GIC architecture version 3 and version 4:
      Architectural execution of a DSB instruction guarantees that
      the last value written to ICC_IGRPEN0_EL1, ICC_IGRPEN1_EL1,
      ICC_IGRPEN1_EL3 or GICC_CTLR.{EnableGrp0, EnableGrp1}is observed
      by the associated Redistributor.
      An ISB or other context synchronization operation must precede
      the DSB to ensure visibility of System register writes.
      Signed-off-by: default avatarMing Huang <huangming@linux.alibaba.com>
      Change-Id: Iff1475657f401374c761b5e8f2f5b3a4b2040e9d
      5a5e0aac
  2. 16 Jul, 2021 1 commit
  3. 13 Jul, 2021 2 commits
  4. 12 Jul, 2021 3 commits
  5. 09 Jul, 2021 2 commits
  6. 08 Jul, 2021 2 commits
  7. 07 Jul, 2021 3 commits
  8. 05 Jul, 2021 8 commits
  9. 02 Jul, 2021 7 commits
  10. 01 Jul, 2021 5 commits
  11. 30 Jun, 2021 6 commits