1. 10 Aug, 2020 1 commit
  2. 15 May, 2020 1 commit
  3. 14 May, 2020 1 commit
    • Manish V Badarkhe's avatar
      Implement workaround for AT speculative behaviour · 45aecff0
      Manish V Badarkhe authored
      During context switching from higher EL (EL2 or higher)
      to lower EL can cause incorrect translation in TLB due to
      speculative execution of AT instruction using out-of-context
      translation regime.
      
      Workaround is implemented as below during EL's (EL1 or EL2)
      "context_restore" operation:
      1. Disable page table walk using SCTLR.M and TCR.EPD0 & EPD1
         bits for EL1 or EL2 (stage1 and stage2 disabled)
      2. Save all system registers except TCR and SCTLR (for EL1 and EL2)
      3. Do memory barrier operation (isb) to ensure all
         system register writes are done.
      4. Restore TCR and SCTLR registers (for EL1 and EL2)
      
      Errata details are available for various CPUs as below:
      Cortex-A76: 1165522
      Cortex-A72: 1319367
      Cortex-A57: 1319537
      Cortex-A55: 1530923
      Cortex-A53: 1530924
      
      More details can be found in mail-chain:
      https://lists.trustedfirmware.org/pipermail/tf-a/2020-April/000445.html
      
      
      
      Currently, Workaround is implemented as build option which is default
      disabled.
      Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
      Change-Id: If8545e61f782cb0c2dda7ffbaf50681c825bd2f0
      45aecff0
  4. 13 May, 2020 2 commits
  5. 30 Apr, 2020 1 commit
  6. 21 Apr, 2020 1 commit
  7. 17 Apr, 2020 1 commit
  8. 16 Apr, 2020 3 commits
  9. 15 Apr, 2020 3 commits
  10. 07 Apr, 2020 1 commit
  11. 06 Apr, 2020 1 commit
  12. 03 Apr, 2020 1 commit
  13. 01 Apr, 2020 3 commits
  14. 31 Mar, 2020 2 commits
  15. 30 Mar, 2020 1 commit
    • Alexei Fedorov's avatar
      TF-A GICv3 driver: Introduce makefile · a6ea06f5
      Alexei Fedorov authored
      
      
      This patch moves all GICv3 driver files into new added
      'gicv3.mk' makefile for the benefit of the generic driver
      which can evolve in the future without affecting platforms.
      The patch adds GICv3 driver configuration flags
      'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
      'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
      'GICv3 driver options' section of 'build-option.rst'
      document.
      
      NOTE: Platforms with GICv3 driver need to be modified to
      include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.
      
      Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      a6ea06f5
  16. 27 Mar, 2020 1 commit
  17. 26 Mar, 2020 3 commits
  18. 23 Mar, 2020 1 commit
  19. 20 Mar, 2020 1 commit
  20. 17 Mar, 2020 2 commits
  21. 16 Mar, 2020 1 commit
    • Louis Mayencourt's avatar
      fconf: Clean Arm IO · a6de824f
      Louis Mayencourt authored
      
      
      Merge the previously introduced arm_fconf_io_storage into arm_io_storage. This
      removes the duplicate io_policies and functions definition.
      
      This patch:
      - replace arm_io_storage.c with the content of arm_fconf_io_storage.c
      - rename the USE_FCONF_BASED_IO option into ARM_IO_IN_DTB.
      - use the ARM_IO_IN_DTB option to compile out io_policies moved in dtb.
      - propagate DEFINES when parsing dts.
      - use ARM_IO_IN_DTB to include or not uuid nodes in fw_config dtb.
      - set the ARM_IO_IN_DTB to 0 by default for fvp. This ensure that the behavior
        of fvp stays the same as it was before the introduction of fconf.
      
      Change-Id: Ia774a96d1d3a2bccad29f7ce2e2b4c21b26c080e
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      a6de824f
  22. 14 Mar, 2020 1 commit
  23. 12 Mar, 2020 3 commits
    • Sandrine Bailleux's avatar
      Mention COT build option in trusted-board-boot-build.rst · d935b951
      Sandrine Bailleux authored
      Since commit 3bff910d
      
       ("Introduce COT
      build option"), it is now possible to select a different Chain of Trust
      than the TBBR-Client one.
      
      Make a few adjustments in the documentation to reflect that. Also make
      some minor improvements (fixing typos, better formatting, ...)  along
      the way.
      
      Change-Id: I3bbadc441557e1e13311b6fd053fdab6b10b1ba2
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      d935b951
    • Sandrine Bailleux's avatar
      Update cryptographic algorithms in TBBR doc · 316c5cc6
      Sandrine Bailleux authored
      
      
      The TBBR documentation has been written along with an early
      implementation of the code. At that time, the range of supported
      encryption and hash algorithms was failry limited. Since then, support
      for other algorithms has been added in TF-A but the documentation has
      not been updated.
      
      Instead of listing them all, which would clutter this document while
      still leaving it at risk of going stale in the future, remove specific
      references to the original algorithms and point the reader at the
      relevant comprehensive document for further details.
      
      Change-Id: I29dc50bc1d53b728091a1fbaa1c3970fb999f7d5
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      316c5cc6
    • Chris Kay's avatar
      juno/sgm: Maximize space allocated to SCP_BL2 · ddc93cba
      Chris Kay authored
      
      
      To accommodate the increasing size of the SCP_BL2 binary, the base
      address of the memory region allocated to SCP_BL2 has been moved
      downwards from its current (mostly) arbitrary address to the beginning
      of the non-shared trusted SRAM.
      
      Change-Id: I086a3765bf3ea88f45525223d765dc0dbad6b434
      Signed-off-by: default avatarChris Kay <chris.kay@arm.com>
      ddc93cba
  24. 11 Mar, 2020 4 commits