1. 13 Sep, 2019 1 commit
    • Alexei Fedorov's avatar
      Refactor ARMv8.3 Pointer Authentication support code · ed108b56
      Alexei Fedorov authored
      
      
      This patch provides the following features and makes modifications
      listed below:
      - Individual APIAKey key generation for each CPU.
      - New key generation on every BL31 warm boot and TSP CPU On event.
      - Per-CPU storage of APIAKey added in percpu_data[]
        of cpu_data structure.
      - `plat_init_apiakey()` function replaced with `plat_init_apkey()`
        which returns 128-bit value and uses Generic timer physical counter
        value to increase the randomness of the generated key.
        The new function can be used for generation of all ARMv8.3-PAuth keys
      - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`.
      - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions
        generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively;
        pauth_disable_el1()` and `pauth_disable_el3()` functions disable
        PAuth for EL1 and EL3 respectively;
        `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from
        cpu-data structure.
      - Combined `save_gp_pauth_registers()` function replaces calls to
        `save_gp_registers()` and `pauth_context_save()`;
        `restore_gp_pauth_registers()` replaces `pauth_context_restore()`
        and `restore_gp_registers()` calls.
      - `restore_gp_registers_eret()` function removed with corresponding
        code placed in `el3_exit()`.
      - Fixed the issue when `pauth_t pauth_ctx` structure allocated space
        for 12 uint64_t PAuth registers instead of 10 by removal of macro
        CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h`
        and assigning its value to CTX_PAUTH_REGS_END.
      - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions
        in `msr	spsel`  instruction instead of hard-coded values.
      - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI.
      
      Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      ed108b56
  2. 14 Mar, 2019 1 commit
    • Sandrine Bailleux's avatar
      Put Pointer Authentication key value in BSS section · 47102b35
      Sandrine Bailleux authored
      
      
      The dummy implementation of the plat_init_apiakey() platform API uses
      an internal 128-bit buffer to store the initial key value used for
      Pointer Authentication support.
      
      The intent - as stated in the file comments - was for this buffer to
      be write-protected by the MMU. Initialization of the buffer would be
      performed before enabling the MMU, thus bypassing write protection
      checks.
      
      However, the key buffer ended up into its own read-write section by
      mistake due to a typo on the section name ('rodata.apiakey' instead of
      '.rodata.apiakey', note the leading dot). As a result, the linker
      script was not pulling it into the .rodata output section.
      
      One way to address this issue could have been to fix the section
      name. However, this approach does not work well for BL1. Being the
      first image in the boot flow, it typically is sitting in real ROM
      so we don't have the capacity to update the key buffer at any time.
      
      The dummy implementation of plat_init_apiakey() provided at the moment
      is just there to demonstrate the Pointer Authentication feature in
      action. Proper key management and key generation would have to be a
      lot more careful on a production system.
      
      Therefore, the approach chosen here to leave the key buffer in
      writable memory but move it to the BSS section. This does mean that
      the key buffer could be maliciously updated for intalling unintended
      keys on the warm boot path but at the feature is only at an
      experimental stage right now, this is deemed acceptable.
      
      Change-Id: I121ccf35fe7bc86c73275a4586b32d4bc14698d6
      Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      47102b35
  3. 27 Feb, 2019 1 commit