- 14 Jun, 2021 1 commit
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Yann Gautier authored
The arm-gic.h was a concatenation of arm-gic.h and irq.h from Linux. Just copy the 2 files here. They both have MIT license which is accepted in TF-A. With this alignment, a new macro is added (GIC_CPU_MASK_SIMPLE). Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ib45174f35f1796ebb7f34af861b59810cfb808b0
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- 27 Apr, 2021 1 commit
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Alexei Fedorov authored
This patch fixes static checks errors reported for missing copyright in `include/dt-bindings/interrupt-controller/arm-gic.h` and the include order of header files in `.dts` and `.dtsi` files. Change-Id: I2baaf2719fd2c84cbcc08a8f0c4440a17a9f24f6 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 26 Apr, 2021 1 commit
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Chris Kay authored
The `arm-gic.h` file distributed by the Linux kernel is disjunctively dual-licensed under the GPL-2.0 or MIT licenses, but the BSD-3-Clause license has been applied in violation of the requirements of both licenses. This change ensures the file is correctly licensed under the terms of the MIT license, and that we comply with it by distributing a copy of the license text. Change-Id: Ie90066753a5eb8c0e2fc95ba43e3f5bcbe2fa459 Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 21 Apr, 2021 1 commit
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Alexei Fedorov authored
The Arm Generic Timer specification mandates that the interrupt associated with each timer is low level triggered, see: Arm Cortex-A76 Core: "Each timer provides an active-LOW interrupt output to the SoC." Arm Cortex-A53 MPCore Processor: "It generates timer events as active-LOW interrupt outputs and event streams." The following files in fdts\ fvp-base-gicv3-psci-common.dtsi fvp-base-gicv3-psci-aarch32-common.dtsi fvp-base-gicv2-psci-aarch32.dts fvp-base-gicv2-psci.dts fvp-foundation-gicv2-psci.dts fvp-foundation-gicv3-psci.dts describe interrupt types as edge rising IRQ_TYPE_EDGE_RISING = 0x01: interrupts = <1 13 0xff01>, <1 14 0xff01>, <1 11 0xff01>, <1 10 0xff01>; , see include\dt-bindings\interrupt-controller\arm-gic.h: which causes Linux to generate the warnings below: arch_timer: WARNING: Invalid trigger for IRQ5, assuming level low arch_timer: WARNING: Please fix your firmware This patch adds GIC_CPU_MASK_RAW macro definition to include\dt-bindings\interrupt-controller\arm-gic.h, modifies interrupt type to IRQ_TYPE_LEVEL_LOW and makes use of type definitions in arm-gic.h. Change-Id: Iafa2552a9db85a0559c73353f854e2e0066ab2b9 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 18 Jan, 2019 1 commit
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Yann Gautier authored
The drivers are also updated to reflect the changes. Set RCC as non-secure. Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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