- 13 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually. Documentation updated to reflect the changes. Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Jul, 2018 1 commit
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Ying-Chun Liu (PaulLiu) authored
Running optee_test failed because SEC_DRAM0_SIZE is too small. Previous is 2 MB. We enlarge it to 11 MB for passing the test. Also we reduce the NS_DRAM0_SIZE from 13MB to 4MB so that the whole section is still fit in 16MB. This commit also modified the document to reflect the changes we've made in code. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 11 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Implement minimal interrupt routing functions. All interrupts are treated as non-secure interrupts to be handled by the non-secure world. Add note to the documentation about disabling FIQs qhen using OP-TEE with Linux. Change-Id: I937096542d973925e43ae946c5d0b306d0d95a94 Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Jul, 2018 2 commits
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Ying-Chun Liu (PaulLiu) authored
Add paragraph for how to enable Trusted Board Boot for rpi3 Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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Ying-Chun Liu (PaulLiu) authored
For Trusted Board Boot we enlarge the BL1 size from 64k to 128k. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 03 Jul, 2018 1 commit
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Andre Przywara authored
The H6 is Allwinner's most recent SoC. It shares most peripherals with the other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory map. Introduce a separate platform target, which includes a different header file to cater for the address differences. Also add the new build target to the documentation. The new ATF platform name is "sun50i_h6". Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 28 Jun, 2018 2 commits
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Andre Przywara authored
Add two empty lines to denote the paragraphs properly and improve readability. Reported-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Amit Singh Tomar authored
This patch is an attempt to run Trusted OS (OP-TEE OS being one of them) along side BL31 image. ATF supports multiple SPD's that can take dispatcher name (opteed for OP-TEE OS) as an input using the 'SPD=<dispatcher name>' option during bl31 build. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
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- 23 Jun, 2018 1 commit
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Amit Singh Tomar authored
This patch is an attempt to run Trusted OS (OP-TEE OS being one of them) along side BL31 image. ATF supports multiple SPD's that can take dispatcher name (opteed for OP-TEE OS) as an input using the 'SPD=<dispatcher name>' option during bl31 build. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
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- 21 Jun, 2018 1 commit
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Sumit Garg authored
Add Makefile and plaform definations file. My thanks to Daniel Thompson and Ard Biesheuvel for the bits and pieces I've taken from their earlier work regarding build and deploy steps for Developerbox based on Synquacer SoCs. They deserve much of the credit for this work although, since I assembled and tested things, any blame is probably mine. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Daniel Thompson <daniel.thompson@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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- 19 Jun, 2018 4 commits
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Nishanth Menon authored
Create the baseline Makefile, platform definitions file and platform specific assembly macros file. This includes first set of constants for the platform including cache sizes and linker format and a stub for BL31 and the basic memory layout K3 SoC family of processors do not use require a BL1 or BL2 binary, since such functions are provided by an system controller on the SoC. This lowers the burden of ATF to purely managing the local ARM cores themselves. Signed-off-by: Benjamin Fair <b-fair@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com>
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Ying-Chun Liu (PaulLiu) authored
Describe how to use BL32 build variable to load OP-TEE into FIP. Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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Anson Huang authored
NXP's i.MX8QM is an ARMv8 SoC with 2 clusters, 2 Cortex-A72 cores in one cluster and 4 Cortex-A53 in the other cluster, and also has system controller (Cortex-M4) inside, documentation can be found in below link: https://www.nxp.com/products/processors-and-microcontrollers/ applications-processors/i.mx-applications-processors/i.mx-8-processors:IMX8-SERIES This patch adds support for booting up SMP linux kernel (v4.9). Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Anson Huang authored
NXP's i.MX8QX is an ARMv8 SoC with 4 Cortex-A35 cores and system controller (Cortex-M4) inside, documentation can be found in below link: https://www.nxp.com/products/processors-and-microcontrollers/ applications-processors/i.mx-applications-processors/i.mx-8-processors:IMX8-SERIES This patch adds support for booting up SMP linux kernel (v4.9). Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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- 15 Jun, 2018 1 commit
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Samuel Holland authored
The Allwinner A64 SoC is quite popular on single board computers. It comes with four Cortex-A53 cores in a singe cluster and the usual peripherals for set-top box/tablet SoC. The ATF platform target is called "sun50i_a64". [Andre: adapted to amended directory layout, removed unneeded definitions ] Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 13 Jun, 2018 1 commit
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Antonio Nino Diaz authored
The order of the arguments of memmap was swapped. The old command was reserving 256 MiB from the 16 MiB barrier, it should be reserving only 16 MiB at the 256 MiB barrier. It worked because the memory used by the Trusted Firmware was reserved anyway. Change-Id: I3fefcfc0105ecf05ba5606517bc3236f4eb24ceb Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 10 Apr, 2018 1 commit
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Jiafei Pan authored
This patch introduce TF-A support for NXP's ls1043a platform. more details information of ls1043a chip and ls1043ardb board can be found at docs/plat/ls1043a.rst. Boot sequence on ls1043a is: bootrom loads bl1 firstly, then bl1 loads bl2, bl2 will load bl31, bl32 and bl33, bl31 will boot bl32(tee os) and bl33(u-boot or uefi), bl33 boot Linux kernel. Now TF-A on ls1043ardb platform has the following features in this patch: * Support boot from Nor flash. * TF-A can boot bl33 which runs in el2 of non-secure world. * TF-A boot OPTee OS. * Support PSCI Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Signed-off-by: Chenyin.Ha <Chenyin.Ha@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> Signed-off-by: Wen He <wen.he_1@nxp.com>
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- 27 Mar, 2018 1 commit
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Antonio Nino Diaz authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. The crash console doesn't use this API, it uses internally the core functions of the 16550 console. `bl31_plat_runtime_setup` is no longer needed. When this platform port was introduced, that function used to disable the console. It was needed to override that behaviour. The new behaviour is to switch to the runtime console. The console is registered for all scopes (boot, crash and runtime) in `rpi3_console_init` so it is not needed to override the default behaviour anymore. Update documentation. Change-Id: If2ee8f91044216183b7ef142e5c05ad6220ae92f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 15 Mar, 2018 1 commit
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Dan Handley authored
Update Arm Trusted Firmware references in the upstream documents to Trusted Firmware-A (TF-A). This is for consistency with and disambiguation from Trusted Firmware-M (TF-M). Also update other Arm trademarks, e.g. ARM->Arm, ARMv8->Armv8-A. Change-Id: I8bb0e18af29c6744eeea2dc6c08f2c10b20ede22 Signed-off-by: Dan Handley <dan.handley@arm.com> Signed-off-by: David Cunado <david.cunado@arm.com>
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- 05 Mar, 2018 2 commits
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode. When flush images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode. When we recovery images in recovery mode, keep to use BL1. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 29 Jan, 2018 1 commit
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Andreas Färber authored
The correct name of the manufacturer is LeMaker. Signed-off-by: Andreas Färber <afaerber@suse.de>
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- 24 Jan, 2018 1 commit
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Masahiro Yamada authored
UniPhier platform implements non-TF boot ROM. Prior to the BL2-AT-EL3 support, BL1 (worked as a pseudo ROM) was needed just for ensuring BL2 is entered at EL1-S. Now, this platform is able to avoid this waste. Enable the BL2_AT_EL3 option, and remove BL1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 20 Dec, 2017 1 commit
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Masahiro Yamada authored
Commit 6f625747 ("Convert documentation to reStructuredText") automatically converted all documents by a tool. I see some parts were converted in an ugly way (or, at least, it is not my intention). Also, the footnote is apparently broken. I checked this document by my eyes, and reformated it so that it looks nicer both in plain text and reST form. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 06 Dec, 2017 1 commit
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Antonio Nino Diaz authored
The document was being rendered incorrectly. Change-Id: I6e243d17d7cb6247f91698bc195eb0f6efeb7d17 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 01 Dec, 2017 1 commit
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Antonio Nino Diaz authored
Added design documentation and usage guide for the AArch64 port of the Arm Trusted Firmware to the Raspberry Pi 3. Change-Id: I1be60fbbd54c797b48a1bcebfb944d332616a0de Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 29 Sep, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 01 Sep, 2017 1 commit
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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- 14 Jul, 2017 1 commit
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Jorge Ramirez-Ortiz authored
The board features the Hi3798C V200 with an integrated quad-core 64-bit ARM Cortex A53 processor and high performance Mali T720 GPU, making it capable of running any commercial set-top solution based on Linux or Android. Its high performance specification also supports a premium user experience with up to H.265 HEVC decoding of 4K video at 60 frames per second. SOC Hisilicon Hi3798CV200 CPU Quad-core ARM Cortex-A53 64 bit DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB USB Two USB 2.0 ports One USB 3.0 ports CONSOLE USB-micro port for console support ETHERNET 1 GBe Ethernet PCIE One PCIe 2.0 interfaces JTAG 8-Pin JTAG EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor WIFI 802.11AC 2*2 with Bluetooth CONNECTORS One connector for Smart Card One connector for TSI The platform boot sequence is as follows: l-loader --> arm_trusted_firmware --> u-boot Repositories: - https://github.com/Linaro/poplar-l-loader.git - https://github.com/Linaro/poplar-u-boot.git U-Boot is also upstream in the project's master branch. Make sure you are using the correct branch on each one of these repositories. The definition of "correct" might change over time (at this moment in time this would be the "latest" branch). Build Line: make CROSS_COMPILE=aarch64-linux-gnu- all fip SPD=none DEBUG=1 PLAT=poplar BL33=/path/to/u-boot.bin Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Alex Elder <elder@linaro.org> Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Alex Elder <elder@linaro.org>
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- 12 Jul, 2017 4 commits
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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Victor Chong authored
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 29 Jun, 2017 3 commits
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Douglas Raillard authored
Removed Markdown documents as they have been converted to reStructuredText. Change-Id: I3148222eb31258f158f64de4ddcdda4b232ce483 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Douglas Raillard authored
Due to recent issues in the rendering of the documentation on GitHub and some long-standing issues like the lack of automatic table of content in Markdown, the documentation has been converted to reStructuredText. Basic constructs looks pretty similar to Markdown. Automatically convert GitHub markdown documentation to reStructuredText using pandoc. Change-Id: If20b695acedc6d1b49c8d9fb64efd6b6ba23f4a9 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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Douglas Raillard authored
Change some hard-to-convert constructs to cleaner ones. Fix a broken link. Change-Id: Ida70aa1da0af7a107b0e05eb20b8d46669a0380b Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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- 12 Jun, 2017 2 commits
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Masahiro Yamada authored
Add TSP to test BL32 without relying on external projects. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Initial commit for Socionext UniPhier SoC support. BL1, Bl2, and BL31 are supported. Refer to docs/plat/socionext-uniphier.md for more detais. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 07 Jun, 2017 1 commit
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Haojian Zhuang authored
Add document on HiKey960 platform and how to build. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 24 May, 2017 1 commit
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Haojian Zhuang authored
Add the description on hikey and how to build. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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