- 13 Jan, 2021 21 commits
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Biju Das authored
Move DDR/QoS/PFC header files, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I2cc0ceda8d05b6b8d95a69afdc233dc0d098e850
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Biju Das authored
Move rpc driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move avs driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move authentication driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move dma driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move watch driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move rom driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move delay driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move console/scif driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move pwrc driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move io driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move eMMC driver code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Move plat common sources to common directory, so that same code can be re-used by both R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
Create a common directory and move the header and assembly files so that the common code can be used by both Renesas R-Car Gen3 and RZ/G2 platforms. Signed-off-by:
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Biju Das authored
This patch fixes checkpatch warnings and replaces TAB with space after #define macros. Signed-off-by:
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Biju Das authored
Fix checkpatch warnings. Signed-off-by:
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Biju Das authored
Fix checkpatch warnings. Signed-off-by:
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Biju Das authored
Sort the header includes alphabetically, fix typos and drop unneeded TAB and replace it with space Signed-off-by:
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Biju Das authored
Sort the header includes alphabetically and fix checkpatch warnings. Signed-off-by:
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Manish Pandey authored
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Masahisa Kojima authored
This implements support for UEFI secure variable storage using standalone MM framework on qemu_sbsa platform. Non-secure shared memory between UEFI and standalone MM is allocated at the top of DRAM. DRAM size of qemu_sbsa varies depends on the QEMU parameter, so the non-secure shared memory is allocated by trusted firmware and passed the base address and size to UEFI through device tree "/reserved-memory" node. Change-Id: I367191f408eb9850b7ec7761ee346b014c539767 Signed-off-by:Masahisa Kojima <masahisa.kojima@linaro.org>
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- 12 Jan, 2021 8 commits
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bipin.ravi authored
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johpow01 authored
Cortex A78 erratum 1941498 is a Cat B erratum that applies to revisions r0p0, r1p0, and r1p1. The workaround is to set bit 8 in the ECTLR_EL1 register, there is a small performance cost (<0.5%) for setting this bit. SDEN can be found here: https://documentation-service.arm.com/static/5fb66157ca04df4095c1cc2e Signed-off-by:
John Powell <john.powell@arm.com> Change-Id: I959cee8e3d46c1b84ff5e4409ce5945e459cc6a9
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Madhukar Pappireddy authored
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Will Wong authored
Add ability to support PS and System reset after idling the APU, by reading the restart scope from the PMU. Signed-off-by:
Will Wong <willw@xilinx.com> Signed-off-by:
Rajan Vaja <rajan.vaja@xilinx.com> Change-Id: I23c01725d8ebb71ad34be02ab204411b93620702
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Lauren Wehrmeister authored
Merge "plat: marvell: armada: a3k: improve 4GB DRAM usage from 3.375 GB to 3.75 GB" into integration
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Manish Pandey authored
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Manish Pandey authored
* changes: plat/arm: rename rddanielxlr to rdv1mc plat/arm: rename rddaniel to rdv1
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Rajan Vaja authored
ATF is not checking PM version. Add version check in such a way that it is compatible with current and newer version of PM. Signed-off-by:
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- 11 Jan, 2021 11 commits
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Madhukar Pappireddy authored
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Marek Behún authored
The current configuration of CPU windows on Armada 37x0 with 4 GB DRAM can only utilize 3.375 GB of memory. This is because there are only 5 configuration windows, configured as such (in hexadecimal, also showing ranges not configurable by CPU windows): 0 - 80000000 | 2 GB | DDR | CPU window 0 80000000 - C0000000 | 1 GB | DDR | CPU window 1 C0000000 - D0000000 | 256 MB | DDR | CPU window 2 D0000000 - D2000000 | 32 MB | | Internal regs empty space | | | D8000000 - D8010000 | 64 KB | | CCI regs empty space | | | E0000000 - E8000000 | 128 MB | DDR | CPU window 3 E8000000 - F0000000 | 128 MB | PCIe | CPU window 4 empty space | | | FFF00000 - end | 64 KB | | Boot ROM This can be improved by taking into account that: - CCI window can be moved (the base address is only hardcoded in TF-A; U-Boot and Linux will not break with changing of this address) - PCIe window can be moved (upstream U-Boot can change device-tree ranges of PCIe if PCIe window is moved) Change the layout after the Internal regs as such: D2000000 - F2000000 | 512 MB | DDR | CPU window 3 F2000000 - FA000000 | 128 MB | PCIe | CPU window 4 empty space | | | FE000000 - FE010000 | 64 KB | | CCI regs empty space | | | FFF00000 - end | 64 KB | | Boot ROM (Note that CCI regs base address is moved from D8000000 to FE000000 in all cases, not only for the configuration with 4 GB of DRAM. This is because TF-A is built with this address as a constant, so we cannot change this address at runtime only on some boards.) This yields 3.75 GB of usable RAM. Moreover U-Boot can theoretically reconfigure the PCIe window to DDR if it discovers that no PCIe card is connected. This can add another 128 MB of DRAM (resulting only in 128 MB of DRAM not being used). Signed-off-by:Marek Behún <marek.behun@nic.cz> Change-Id: I4ca1999f852f90055fac8b2c4f7e80275a13ad7e
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Manish Pandey authored
* changes: drivers: renesas: rcar: io: Code cleanup drivers: renesas: rcar: pwrc: Code cleanup drivers: renesas: rcar: common: Code cleanup drivers: renesas: rcar: watchdog: Fix typo drivers: renesas: rcar: scif: Fix coding style drivers: renesas: rcar: iic_dvfs: Fix coding style
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Madhukar Pappireddy authored
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Manish Pandey authored
* changes: drivers: renesas: rcar: dma: Fix coding style drivers: renesas: rcar: delay: Fix checkpatch warnings drivers: renesas: rcar: avs: Fix checkpatch warnings drivers: renesas: rcar: auth: Use space instead of TAB
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Michal Simek authored
Write char if fifo is empty. If this is done like this all chars are printed. Because origin code just put that chars to fifo and in case of reset messages were missing. Before this change chars are put to fifo and only check before adding if fifo is full. The patch is changing this logic that it is adding char only when fifo is empty to make sure that in case of reset (by another SW for example) all chars are printed. Maybe one char can be missed but for IP itself it is much easier to send just one char compare to full fifo. Signed-off-by:Michal Simek <michal.simek@xilinx.com> Change-Id: Ic24c2c1252bce24be2aed68ee29477ca4a549e5f
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Biju Das authored
This patch fixes checkpatch warnings and arrange header as per TF-A coding style. Signed-off-by:
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Biju Das authored
Sort the headers alphabetically and replace TAB with a space after #define. Signed-off-by:
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Biju Das authored
This patches fixes checkpatch warnings, replace TAB with space after #define macros and arrange header as per TF-A coding style. Signed-off-by:
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Biju Das authored
Fix checkpatch warnings. There are no functional changes. Signed-off-by:
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Biju Das authored
This patch fixes the below checkpatch warnings Line 13: WARNING: please, no spaces at the start of a line Line 15: WARNING: please, no spaces at the start of a line Line 18: WARNING: Missing a blank line after declarations Line 24: WARNING: please, no spaces at the start of a line Line 26: WARNING: please, no spaces at the start of a line Line 29: WARNING: Missing a blank line after declarations Signed-off-by:
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