Commits · 67bc721b2bc321e07b1ea50c53dd35915dc2a949 · adam.huang / Arm Trusted Firmware

20 Mar, 2017 4 commits

Tegra: memctrl_v2: check GPU state before VPR programming · 67bc721b

Varun Wadekar authored Feb 17, 2016



The GPU is the real consumer of the video protected memory region
and it needs to be in reset to pick up the new region.

This patch checks if the GPU is in reset before we program the new
video protected memory region settings.

Change-Id: I44f553bfcf07b1975abad53b245954be966c8aeb
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

67bc721b

Tegra: memctrl_v2: no SID override for SCE block · 8020793f

Varun Wadekar authored Feb 17, 2016



This patch fixes the incorrect override settings for the SCE
hardware block.

Original change by Pekka Pessi <ppessi@nvidia.com>

Change-Id: I33db55d6004331988b52ca70157aab1409f4829f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

8020793f

Tegra: memctrl_v2: secure the on-chip TZSRAM memory · d48c0c45

Varun Wadekar authored Dec 30, 2015



This patch programs the Memory controller's control registers
to disable non-secure accesses to the TZRAM. In case these
registers are already programmed by the BL2/BL30, then the
driver just bails out.

Change-Id: Ia1416988050e3d067296373060c717a260499122
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

d48c0c45

Tegra: memctrl_v2: Memory Controller Driver (v2) · 412dd5c5

Varun Wadekar authored Sep 20, 2015



This patch adds driver for the Memory Controller (v2) in the newer
Tegra SoCs. The newer hardware uses ARM's SMMU hardware instead of
the proprietary block in the past.

Change-Id: I78359da780dc840213b6e99954e45e34428d4fff
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

412dd5c5