- 12 Sep, 2019 3 commits
-
-
Soby Mathew authored
-
Soby Mathew authored
* changes: rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3N rcar_gen3: drivers: qos: update QoS setting rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headers rcar_gen3: drivers: ddr_b: Fix line-over-80s rcar_gen3: drivers: ddr_b: Further checkpatch cleanups rcar_gen3: drivers: ddr_b: Clean up camel case rcar_get3: drivers: ddr_b: Basic checkpatch fixes rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B rcar_get3: drivers: ddr: Clean up common code
-
Soby Mathew authored
* changes: amlogic: Fix includes order amlogic: Fix header guards amlogic: Fix prefixes in the SoC specific files amlogic: Fix prefixes in the PM code amlogic: Fix prefixes in the SCPI related code amlogic: Fix prefixes in the MHU code amlogic: Fix prefixes in the SIP/SVC code amlogic: Fix prefixes in the thermal driver amlogic: Fix prefixes in the private header file amlogic: Fix prefixes in the efuse driver amlogic: Fix prefixes in the platform macros file amlogic: Fix prefixes in the helpers file amlogic: Rework Makefiles amlogic: Move the SIP SVC code to common directory amlogic: Move topology file to common directory amlogic: Move thermal code to common directory amlogic: Move MHU code to common directory amlogic: Move efuse code to common directory amlogic: Move platform macros assembly file to common directory amlogic: Introduce unified private header file amlogic: Move SCPI code to common directory amlogic: Move the SHA256 DMA driver to common directory amlogic: Move assembly helpers to common directory amlogic: Introduce directory parameters in the makefiles meson: Rename platform directory to amlogic
-
- 11 Sep, 2019 4 commits
-
-
Carlo Caione authored
As part of the code refactoring fix the order of the include files across all the source files. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ice72f687cc26ee881a9051168149467688100cfb
-
Carlo Caione authored
Make the header guards more generic and contextually remove the GXBB_BL31_PLAT_PARAM_VAL value that is unused on the GXL platform. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I842fa2e084e71280ae17b39c67877e844821a171
-
Soby Mathew authored
-
Justin Chadwell authored
This patch adds support for the Undefined Behaviour sanitizer. There are two types of support offered - minimalistic trapping support which essentially immediately crashes on undefined behaviour and full support with full debug messages. The full support relies on ubsan.c which has been adapted from code used by OPTEE. Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
-
- 10 Sep, 2019 1 commit
-
-
Soby Mathew authored
* changes: mmc: stm32_sdmmc2: correctly manage block size mmc: stm32_sdmmc2: manage max-frequency property from DT stm32mp1: move check_header() to common code stm32mp1: keep console during runtime stm32mp1: sp_min: initialize MMU and cache earlier stm32mp1: add support for LpDDR3 stm32mp1: use a common function to check spinlock is available clk: stm32mp: enable RTCAPB clock for dual-core chips stm32mp1: check if the SoC is single core stm32mp1: print information about board stm32mp1: print information about SoC stm32mp1: add watchdog support
-
- 05 Sep, 2019 24 commits
-
-
Carlo Caione authored
Remove the GXBB prefix where needed and add SoC specific prefixes for GXBB/GXL. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ic3eb3a77ca2d9c779a9dee5cee786e9c16ecdb27
-
Carlo Caione authored
Remove the GXBB prefix from the code in the common directory and add SoC-specific prefixes in the SoC specific code. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ic983ef70b0ef23f95088dd8df488d8c42c3bc030
-
Carlo Caione authored
Add a new aml_* prefix to the SCPI related function calls. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739
-
Carlo Caione authored
Make the MHU code AML specific adding a new aml_* prefix and remove the GXBB prefix from the register names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I8f20918e29f08542bd71bd679f88e65b4efaa7d2
-
Carlo Caione authored
All the SIP/SVC related code is currently the same between GXL and GXBB. Rename function names and register names to avoid hardcoding the GXBB prefix. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I7e58ab68489df8d4762663fc01fb64e6899cc8bf
-
Carlo Caione authored
No need to have a special SoC-specific prefix. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I0da543e7d92d56604e79440a98027ffd9a2eaa59
-
Carlo Caione authored
The header file is shared between all the SoCs. Better avoiding hardcoding the SoC name in the function names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I9074871bd1ed8a702c1a656e0f50f2d3c6cb0425
-
Carlo Caione authored
The efuse driver is hardcoding the GXBB prefix. No need to do that since the driver is shared between multiple SoCs. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I97691b0bbd55170d8216d301a3fc04feb8c2af2e
-
Carlo Caione authored
Fixing at the same time the related register names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008
-
Carlo Caione authored
The code is the common directory is now generic, no need to have the SoC prefix hardcoded in the function names. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ied3a5e506b9abd4c2d6f893bafef50019bff24f1
-
Carlo Caione authored
Now that every piece is in place, the makefiles can be refactored and slightly beautified removing useless and redundant parts. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: If74e1909df52d475cf4b0dfed819d07d3a4c85b9
-
Carlo Caione authored
The code is the same between GXBB and GXL. Move it to the common source directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c
-
Carlo Caione authored
As done already for multiple files, move the topology file to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Iaca357a089593ad58c35c05c929239132249dcda
-
Carlo Caione authored
As for most of the Amlogic code, this is common between the Amlogic SoCs. Move the code to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Id3f0073ff1f0b9ddbe964f80303323ee4a2f27b0
-
Carlo Caione authored
The MHU code is shared between all the supported platforms. Move it to the common directory instead. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Iaf53122866eae85c13f772927d16836dcfa877a3
-
Carlo Caione authored
The efuse code is the same between GXL and GXBB. Move the code to common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ie37f21d1907a36292724f1fb645a78041fe4a6b3
-
Carlo Caione authored
The platform macros are shared between all the SoCs. Move it to common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ia04c3ffe4d7b068aa701268ed99f69995d8db92b
-
Carlo Caione authored
Now that also the SHA256 DMA driver is shared between all the SoCs, we can have one single private platform header file. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I77d51915f9d8233aeceeed66ed1f491573402cfc
-
Carlo Caione authored
The SCPI code is the same between GXBB and GXL. No need to have it replicated for each SoCs. Move it to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I7e416caf1e9538b3ce7702c0363ee00a054e2451
-
Carlo Caione authored
The SHA256 DMA driver can be used by multiple SoCs. Move it to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
-
Carlo Caione authored
The assembly helpers are common to all the amlogic SoCs. Move the .S file to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I0d8616a7ae22dbcb14848cefd0149b6bb5814ea6
-
Carlo Caione authored
Make the platform name a parameter for the source directories. Besides a cosmetic fix, this is going to be helpful when reusing the same Makefile for different SoCs. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I307897a21800cca8ad68a5ab8972d27e9356ff2a
-
Carlo Caione authored
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
-
Sandrine Bailleux authored
-
- 04 Sep, 2019 1 commit
-
-
Masahiro Yamada authored
The #include "mbedtls/check_config.h" directive first searches for the header in the relative path to mbedtls_config.h, i.e. include/drivers/auth/mbedtls/mbedtls/check_config.h Obviously, it does not exist since check_config.h is located in the mbedtls project. It is more sensible to use #include <...> form. Change-Id: If72a71381f84e7748a2c9f07dd1176559d9bb1d2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-
- 03 Sep, 2019 2 commits
-
-
Alexei Fedorov authored
-
Masahiro Yamada authored
This console driver sends '\r' before 'n', not after. It works, but the convention is "\r\n" (i.e. CRLF) Instead of fixing it in the driver, set CONSOLE_FLAG_TRANSLATE_CRLF to leave it to the framework. Change-Id: I2154e29313739a40dff70cfb5c0f8989136d4ad2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-
- 02 Sep, 2019 5 commits
-
-
Yann Gautier authored
DBLOCKSIZE should be filled such as the data size is 2^DBLOCKSIZE. Hence it is calculated with __builtin_ctz. Change-Id: Id6b5ff9b594afc4fc523a388011beed307e6abd1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
If the max-frequency property is provided in the device tree mmc node, it should be managed. The max allowed frequency will be the min between this property value and what the card can support. Change-Id: I885b676c3300d2670a0fe4c6ecab87758b5893ad Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
This function can be used on several stm32mp devices, it is then moved in plat/st/common/stm32mp_common.c. Change-Id: I862debe39604410f71a9ddc28713026362e9ecda Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
The runtime console is only kept in DEBUG configuration. Change-Id: I0447dfcacb9a63a12bcdab7c55584d70c3220e5b Signed-off-by: Yann Gautier <yann.gautier@st.com>
-
Yann Gautier authored
This change enhances performance and security in BL32 stage. Change-Id: I64df5995fc6b04f6cf42d6a00a6d3d0f602b5407 Signed-off-by: Yann Gautier <yann.gautier@st.com>
-