- 07 Feb, 2020 1 commit
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Alexei Fedorov authored
At the moment, address demangling is only used by the backtrace functionality. However, at some point, other parts of the TF-A codebase may want to use it. The 'demangle_address' function is replaced with a single XPACI instruction which is also added in 'do_crash_reporting()'. Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: I4424dcd54d5bf0a5f9b2a0a84c4e565eec7329ec
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- 29 Aug, 2019 1 commit
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Justin Chadwell authored
Printing a newline is a relatively common functionality for code to want to do. Therefore, this patch now moves this function into a common part of the code that anyone can use. Change-Id: I2cad699fde00ef8d2aabf8bf35742ddd88d090ba Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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- 15 Aug, 2019 1 commit
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Alexei Fedorov authored
This patch modifies crash reporting for AArch64 to provide aligned output of register dump and GIC registers. Change-Id: I8743bf1d2d6d56086e735df43785ef28051c5fc3 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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- 22 Jul, 2019 1 commit
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Imre Kis authored
The AArch32 system registers are not listed if the platform supports AArch64 only. Change-Id: I087a10ae6e7cad1bb52775a344635dbac1f12679 Signed-off-by: Imre Kis <imre.kis@arm.com>
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- 04 Jan, 2019 1 commit
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Antonio Nino Diaz authored
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca339 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Dec, 2017 1 commit
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Julius Werner authored
In assembly code it can be useful to have a constant for the width of a register in the current architecture, so this patch adds one to <utils_def.h> and replaces the existing custom one in crash_reporting.S with that. It also fixes up the BIT() macro in the same file so that it can be safely used in assembly code. Change-Id: I10513a311f3379e767396e6ddfbae8d2d8201464 Signed-off-by: Julius Werner <jwerner@chromium.org>
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- 15 Nov, 2017 1 commit
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David Cunado authored
The FPEXC32_EL2 register controls SIMD and FP functionality when the lower ELs are executing in AArch32 mode. It is architecturally mapped to AArch32 system register FPEXC. This patch removes FPEXC32_EL2 register from the System Register context and adds it to the floating-point context. EL3 only saves / restores the floating-point context if the build option CTX_INCLUDE_FPREGS is set to 1. The rationale for this change is that if the Secure world is using FP functionality and EL3 is not managing the FP context, then the Secure world will save / restore the appropriate FP registers. NOTE - this is a break in behaviour in the unlikely case that CTX_INCLUDE_FPREGS is set to 0 and the platform contains an AArch32 Secure Payload that modifies FPEXC, but does not save and restore this register Change-Id: Iab80abcbfe302752d52b323b4abcc334b585c184 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 03 May, 2017 1 commit
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dp-arm authored
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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- 31 Mar, 2017 1 commit
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Antonio Nino Diaz authored
This API makes sure that all the characters sent to the crash console are output before returning from it. Porting guide updated. Change-Id: I1785f970a40f6aacfbe592b6a911b1f249bb2735 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Dec, 2016 1 commit
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Jeenu Viswambharan authored
There are many instances in ARM Trusted Firmware where control is transferred to functions from which return isn't expected. Such jumps are made using 'bl' instruction to provide the callee with the location from which it was jumped to. Additionally, debuggers infer the caller by examining where 'lr' register points to. If a 'bl' of the nature described above falls at the end of an assembly function, 'lr' will be left pointing to a location outside of the function range. This misleads the debugger back trace. This patch defines a 'no_ret' macro to be used when jumping to functions from which return isn't expected. The macro ensures to use 'bl' instruction for the jump, and also, for debug builds, places a 'nop' instruction immediately thereafter (unless instructed otherwise) so as to leave 'lr' pointing within the function range. Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0 Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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- 14 Apr, 2016 1 commit
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Gerald Lejeune authored
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting. plat_crash_print_regs merges or calls previously defined plat_print_gic_regs and plat_print_interconnect_regs macros for each existing platforms. NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING` BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS. Fixes: arm-software/tf-issues#373 Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
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- 30 Mar, 2016 1 commit
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Gerald Lejeune authored
Bring ISR bits definition as a mnemonic for troublershooters as well. Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
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- 14 Mar, 2016 1 commit
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Antonio Nino Diaz authored
Added a new platform porting function plat_panic_handler, to allow platforms to handle unexpected error situations. It must be implemented in assembly as it may be called before the C environment is initialized. A default implementation is provided, which simply spins. Corrected all dead loops in generic code to call this function instead. This includes the dead loop that occurs at the end of the call to panic(). All unnecesary wfis from bl32/tsp/aarch64/tsp_exceptions.S have been removed. Change-Id: I67cb85f6112fa8e77bd62f5718efcef4173d8134
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- 21 Dec, 2015 1 commit
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Sandrine Bailleux authored
Change-Id: I6f49bd779f2a4d577c6443dd160290656cdbc59b
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- 08 Apr, 2015 1 commit
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Kévin Petit authored
In order for the symbol table in the ELF file to contain the size of functions written in assembly, it is necessary to report it to the assembler using the .size directive. To fulfil the above requirements, this patch introduces an 'endfunc' macro which contains the .endfunc and .size directives. It also adds a .func directive to the 'func' assembler macro. The .func/.endfunc have been used so the assembler can fail if endfunc is omitted. Fixes ARM-Software/tf-issues#295 Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc Signed-off-by: Kévin Petit <kevin.petit@arm.com>
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- 20 Aug, 2014 1 commit
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Soby Mathew authored
This patch adds handlers for dumping Cortex-A57 and Cortex-A53 specific register state to the CPU specific operations framework. The contents of CPUECTLR_EL1 are dumped currently. Change-Id: I63d3dbfc4ac52fef5e25a8cf6b937c6f0975c8ab
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- 28 Jul, 2014 2 commits
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Soby Mathew authored
This patch adds the CPUECTLR_EL1 register and the CCI Snoop Control register to the list of registers being reported when an unhandled exception occurs. Change-Id: I2d997f2d6ef3d7fa1fad5efe3364dc9058f9f22c
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Soby Mathew authored
This patch reworks the crash reporting mechanism to further optimise the stack and code size. The reporting makes use of assembly console functions to avoid calling C Runtime to report the CPU state. The crash buffer requirement is reduced to 64 bytes with this implementation. The crash buffer is now part of per-cpu data which makes retrieving the crash buffer trivial. Also now panic() will use crash reporting if invoked from BL3-1. Fixes ARM-software/tf-issues#199 Change-Id: I79d27a4524583d723483165dc40801f45e627da5
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- 16 Jun, 2014 1 commit
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Andrew Thoelke authored
This patch prepares the per-cpu pointer cache for wider use by: * renaming the structure to cpu_data and placing in new header * providing accessors for this CPU, or other CPUs * splitting the initialization of the TPIDR pointer from the initialization of the cpu_data content * moving the crash stack initialization to a crash stack function * setting the TPIDR pointer very early during boot Change-Id: Icef9004ff88f8eb241d48c14be3158087d7e49a3
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- 11 Jun, 2014 1 commit
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Andrew Thoelke authored
This patch makes the console crash dump of processor register state optional based on the CRASH_REPORTING make variable. This defaults to only being enabled for DEBUG builds. This can be overridden by setting a different value in the platform makefile or on the make command line. Change-Id: Icfa1b2d7ff0145cf0a85e8ad732f9cee7e7e993f
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- 05 Jun, 2014 1 commit
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Sandrine Bailleux authored
'crash_reporting.S' needs to include 'platform_def.h' to get the definition of PLATFORM_CORE_COUNT. Note: On FVP it was compiling because 'platform_def.h' gets included through 'plat/fvp/include/plat_macros.S' but we don't want to rely on that for other platforms. Change-Id: I51e974776dd0f3bda10ad9849f5ef7b30c629833
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- 16 May, 2014 1 commit
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Soby Mathew authored
This patch implements the register reporting when unhandled exceptions are taken in BL3-1. Unhandled exceptions will result in a dump of registers to the console, before halting execution by that CPU. The Crash Stack, previously called the Exception Stack, is used for this activity. This stack is used to preserve the CPU context and runtime stack contents for debugging and analysis. This also introduces the per_cpu_ptr_cache, referenced by tpidr_el3, to provide easy access to some of BL3-1 per-cpu data structures. Initially, this is used to provide a pointer to the Crash stack. panic() now prints the the error file and line number in Debug mode and prints the PC value in release mode. The Exception Stack is renamed to Crash Stack with this patch. The original intention of exception stack is no longer valid since we intend to support several valid exceptions like IRQ and FIQ in the trusted firmware context. This stack is now utilized for dumping and reporting the system state when a crash happens and hence the rename. Fixes ARM-software/tf-issues#79 Improve reporting of unhandled exception Change-Id: I260791dc05536b78547412d147193cdccae7811a
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