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  1. 22 Nov, 2018 1 commit
    • Sathees Balya's avatar
      romlib: Allow patching of romlib functions · 6baf85b3
      Sathees Balya authored 
      

This change allows patching of functions in the
romlib. This can be done by adding "patch" at the
end of the jump table entry for the function that
needs to be patched in the file jmptbl.i.
Functions patched in the jump table list will be
built as part of the BL image and the romlib
version will not be used

Change-Id: Iefb200cb86e2a4b61ad3ee6180d3ecc39bad537f
Signed-off-by: default avatarSathees Balya <sathees.balya@arm.com>
      6baf85b3
  3. 20 Nov, 2018 4 commits
  5. 19 Nov, 2018 4 commits
  7. 16 Nov, 2018 1 commit
  9. 15 Nov, 2018 10 commits
  11. 14 Nov, 2018 3 commits
    • Sughosh Ganu's avatar
      SPM: Raise running priority of the core while in Secure Partition · 6e3bad36
      Sughosh Ganu authored 
      

The current secure partition design mandates that a) at a point, only
a single core can be executing in the secure partition, and b) a core
cannot be preempted by an interrupt while executing in secure
partition.

Ensure this by activating the SPM priority prior to entering the
parition. Deactivate the priority on return from the
partition.

Change-Id: Icb3473496d16b733564592eef06304a1028e4f5c
Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      6e3bad36
    • Sughosh Ganu's avatar
      SPM: Register Secure Partition priority level with ehf module · 5681b292
      Sughosh Ganu authored 
      

Register a priority level, PLAT_SP_PRI, for secure partition with EL3
exception handling framework(ehf) module.

The secure partition manager(SPM) would raise the core's priority to
PLAT_SP_PRI before entering the secure partition, to protect the core
from getting interrupted while in secure partition.

Change-Id: I686897f052a4371e0efa9b929c07d3ad77249e95
Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      5681b292
    • Sughosh Ganu's avatar
      SPM: EHF: Build EHF module along with Secure Partition Manager · 8a3588a7
      Sughosh Ganu authored 
      

Add a dependency for building EL3 exception handling framework(EHF)
module with the secure partition manager(SPM).

The EHF module is needed for raising the core's running priority
before the core enters the secure partition, and lowering it
subsequently on exit from the secure partition.

Change-Id: Icbe2d0a63f00b46dc593ff3d86b676c9333506c3
Signed-off-by: default avatarSughosh Ganu <sughosh.ganu@arm.com>
      8a3588a7
  13. 13 Nov, 2018 3 commits
  15. 12 Nov, 2018 3 commits
  17. 09 Nov, 2018 5 commits
    • Yann Gautier's avatar
      stm32mp1: remove duplicate function declaration · 7227d892
      Yann Gautier authored 
      

It is already in include/drivers/st/stm32mp1_ddr_helpers.h.
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      7227d892
    • Yann Gautier's avatar
      stm32mp1: correct some static analysis tools issues · 3e6fab43
      Yann Gautier authored 
      

These issues wer found by sparse:

drivers/st/clk/stm32mp1_clk.c:1524:19:
 warning: incorrect type in assignment (different base types)
    expected restricted fdt32_t const [usertype] *pkcs_cell
    got unsigned int const [usertype] *

plat/st/stm32mp1/plat_image_load.c:13:6:
 warning: symbol 'plat_flush_next_bl_params' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16:
 warning: symbol 'plat_get_bl_image_load_info' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13:
 warning: symbol 'plat_get_next_bl_params' was not declared.
 Should it be static?

plat/st/stm32mp1/bl2_io_storage.c:40:10:
 warning: symbol 'block_buffer' was not declared. Should it be static?
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      3e6fab43
    • Yann Gautier's avatar
      drivers: partition: correct some static analysis tools issues · 4cb17707
      Yann Gautier authored 
      

cppcheck:
[drivers/partition/gpt.c:19] -> [drivers/partition/gpt.c:19]:
 (warning) Either the condition 'str_in!=((void*)0)' is redundant
 or there is possible null pointer dereference: name.

sparse:
drivers/partition/gpt.c:39:9:
 warning: Using plain integer as NULL pointer
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      4cb17707
    • Yann Gautier's avatar
      psci: put __dead2 attribute after void in plat_psci_ops · 3c471c35
      Yann Gautier authored 
      

These warnings were issued by sparse:
plat/st/stm32mp1/stm32mp1_pm.c:365:36:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] pwr_domain_pwr_down_wfi )( ... )
    got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:366:23:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] system_off )( ... )
    got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:367:25:
 warning: incorrect type in initializer (different modifiers)
    expected void ( *[noreturn] system_reset )( ... )
    got void ( [noreturn] *<noident> )( ... )

This cannot be changed the other way in all platforms pm drivers
or else there is a compilation error:
plat/st/stm32mp1/stm32mp1_pm.c:234:1: error: attributes should be specified
 before the declarator in a function definition
Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      3c471c35
    • Siva Durga Prasad Paladugu's avatar
      arm64: versal: Add support for new Xilinx Versal ACAPs · f91c3cb1
      Siva Durga Prasad Paladugu authored 
      

Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar
Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with
leading-edge memory and interfacing technologies to deliver powerful
heterogeneous acceleration for any application. The Versal AI Core series has
five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm
Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time
processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines
optimized for high-precision floating point with low latency.

This patch adds Virtual QEMU platform support for
this SoC "versal_virt".
Signed-off-by: default avatarSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      f91c3cb1
  19. 08 Nov, 2018 5 commits
  21. 07 Nov, 2018 1 commit