- 13 Nov, 2018 1 commit
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Pete Batard authored
Some OSes (e.g. Ubuntu 18.04 LTS on Raspberry Pi 3) may disable the runtime UART in a manner that prevents the system from rebooting if ATF tries to send runtime messages there. Also, we don't want the firmware to share the UART with normal world, as this can be a DoS attack vector into the secure world. This patch fixes these 2 issues by introducing new build option RPI3_RUNTIME_UART, that disables the runtime UART by default. Fixes ARM-software/tf-issues#647 Signed-off-by: Pete Batard <pete@akeo.ie>
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- 09 Nov, 2018 1 commit
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Siva Durga Prasad Paladugu authored
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC "versal_virt". Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- 08 Nov, 2018 4 commits
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Jerome Forissier authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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Jerome Forissier authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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Jerome Forissier authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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Antonio Nino Diaz authored
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 06 Nov, 2018 3 commits
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Antonio Nino Diaz authored
Change-Id: I2419416fadfcdf64da8b7690a348007591c4edf3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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ldts authored
Target builds but has not been tested. Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
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ldts authored
Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
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- 05 Nov, 2018 1 commit
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Manish Pandey authored
This option allows the Trusted Firmware to directly jump to Linux kernel for aarch32 without the need of an intermediate loader such as U-Boot. Similar to AArch64 ARM_LINUX_KERNEL_AS_BL33 only available with RESET_TO_SP_MIN=1 as well as BL33 and DTB are preloaded in memory. Change-Id: I908bc1633696be1caad0ce2f099c34215c8e0633 Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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- 01 Nov, 2018 4 commits
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Sudeep Holla authored
When CSS_USE_SCMI_DRIVER is not defined or set to 0, we get the following build error. plat/arm/board/juno/juno_topology.c:16:19: error: ‘CSS_SCMI_PAYLOAD_BASE’ undeclared here (not in a function) .scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE, ^~~~~~~~~~~~~~~~~~~~~ plat/arm/board/juno/juno_topology.c:17:38: error: ‘CSS_SCMI_MHU_DB_REG_OFF’ undeclared here (not in a function) .db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF, ^~~~~~~~~~~~~~~~~~~~~~~ CSS_CPU_PWR_STATE_OFF Fix the error in order to get function legacy SCPI support functional. Change-Id: I00cb80db9968aa0be546e33a3a682a2db87719be Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Antonio Nino Diaz authored
Change-Id: Iae6758ca6395560131d1e1a69a1ecfe50ca8bf83 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Change-Id: I33eaee8e7c983b3042635a448cb8d689ea4e3a12 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The macro EL_IMPLEMENTED() has been deprecated in favour of the new function el_implemented(). Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 31 Oct, 2018 2 commits
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Konstantin Porotchkin authored
Add supprot for Marvell platforms based on Armada-37xx SoC. This includes support for the official Armada-3720 modular development board and EspressoBin community board. The Armada-37xx SoC contains dual Cortex-A53 Application CPU, single secure CPU (Cortex-M3) and the following interfaces: - SATA 3.0 - USB 3.0 and USB 2.0 - PCIe - SDIO (supports boot from eMMC) - SPI - UART - I2c - Gigabit Ethernet Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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Haojian Zhuang authored
It boots failure on CircuitCo HiKey board. The delay could fix the hang issue. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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- 30 Oct, 2018 5 commits
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Andrew F. Davis authored
A recent patch[0] has made setting up page tables into generic code, complete the conversion for TI platforms by removing the use of plat_arm_get_mmap() and using the mmap table directly. [0] 0916c38d ("Convert arm_setup_page_tables into a generic helper") Signed-off-by: Andrew F. Davis <afd@ti.com>
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Antonio Nino Diaz authored
include/plat/arm/common isn't needed by them, and is removed to avoid dependency on Arm platform code. Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
plat/arm files should only be used by Arm platforms. If other platforms use them, they create dependencies that can introduce problems when updating Arm platforms. This patch copies the needed code from Arm platforms so that poplar can be independent from them. Change-Id: I0b194f5bdb0377b8ccacbd400e021614c026c7fe Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Dai Okamura authored
When the SoC issues a command IRQ to SCP, SCP sets STMTOBEIRQ as ACK. The SoC must wait for it before issuing the next command. This commit makes sure to meet the requirement. Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP needs to work, BL2 should load the SCP_BL2 image. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 29 Oct, 2018 5 commits
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Antonio Nino Diaz authored
No functional changes. Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Deepak Pandey authored
This patch adds support for the N1SDP (NeoVerse N1 System Development Platform). It is an initial port and additional features are expected to be added later. The port includes only BL31 support as the System Control Processor (SCP) is expected to take the role of primary boatloader Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10 Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
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Soby Mathew authored
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references to BL31_BASE are replaced by BL31_START as being a symbol exported by the linker, will create a dynamic relocation entry in .rela.dyn and hence will be fixed up by dynamic linker at runtime. Also, we disable RECLAIM_INIT_CODE when PIE is enabled as the init section overlay creates some static relocations which cannot be handled by the dynamic linker currently. Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer. Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Soby Mathew authored
This patch adds a utility function to return the address of a symbol. By default, the compiler generates adr/adrp instruction pair to return the reference and this utility is used to override this compiler generated to code and use `ldr` instruction. This is needed for Position Independent Executable when it needs to reference a symbol which is constant and does not depend on the execute address of the binary. For example, on the FVP, the GICv3 register context is stored in a secure carveout (arm_el3_tzc_dram) within DDR and does not relocate with the BL image. Now if BL31 is executing at a different address other than the compiled address, using adrp/adr instructions to reference this memory will not work as they generate an address that is PC relative. The way to get around this problem is to reference it as non-PC relative (i.e non-relocatable location) via `ldr` instruction. Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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- 26 Oct, 2018 8 commits
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Roberto Vargas authored
This function is not related to Arm platforms and can be reused by other platforms if needed. Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8 Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There are several platforms using arm_setup_page_tables(), which is supposed to be Arm platform only. This creates several dependency problems between platforms. This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib v2 makefile. This way it is possible to detect from C code which version is being used and include the correct header. The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and moved to a common folder. This way, when in doubt, this header can be used to guarantee compatibility, as it includes the correct header based on XLAT_TABLES_LIB_V2. This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so that is now locked in xlat lib v2) and ZynqMP (where it was added as a workaround). Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There seems to be a problem where SCP can't turn CPU0 off. Instead of returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This way all CPUs have a consistent behaviour from the point of view of the caller. Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This works fine for CPU1-3, but it fails for CPU0, where it is simply ignored and leaves CPU0 in a WFI loop. Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running at 1.5Ghz. It also contains a Cortex-M3 used as SCP. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux: - Partial SCPI support. - Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF). - GICv2 driver set up. - Basic SIP services (read efuse data, enable/disable JTAG). This port has been tested in an ODROID-C2. Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da Tested-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Chandni Cherukuri authored
SGI-Clark.Ares platform is a variant of the SGI-Clark platform. It has two clusters of four Ares CPUs each. Though very similar to the SGI575 platform, there are subtle differences. HW_CONFIG and TB_FW_CONFIG dts files have been added. Change-Id: I740a33cbd1c3b1f1984cb56243b46ad379bab3e6 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
SGI-Clark platform is the next version in the Arm's SGI platform series. One of the primary difference between the SGI-575 platform and the SGI-Clark platform is the MHU version (MHUv2 in case of SGI-Clark). Add the required base support for SGI-Clark platform. Change-Id: If396e5279fdf801d586662dad0b55195e81371e4 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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Chandni Cherukuri authored
On SGI platforms that include Ares CPUs, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1' register requires an explicit write to clear it to enable hotplug and idle to function correctly. The reset value of the CORE_PWRDN_EN bit is zero but it still requires this explicit clear to zero. This indicates that this could be a model related issue but for now this issue can be fixed be clearing the CORE_PWRDN_EN bit in the platform specific reset handler function. Change-Id: I8b9884ae27a2986d789bfec2e9ae792ef930944e Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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- 25 Oct, 2018 6 commits
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Antonio Nino Diaz authored
The default behaviour of the plat_crash_console_xxx functions isn't obvious to someone that hasn't read all the documentation. As they are not mandatory, it is unlikely that the code will be checked when doing a platform port, which may mean that some platforms may not have crash console support at all. The idea of this patch is to force platform maintainers to decide how the crash console has to behave so that the final behaviour isn't unexpected. Change-Id: I40b2a7b56c5530c1dcd63eace5bd37ae6335056e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This platform depends on weak functions defined in ``plat/common/aarch64/platform_helpers.S`` that are going to be removed. Change-Id: I5104d091c32271d77ed9690e9dc257c061289def Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Platforms that wish to use the sample functions have to add the file to their Makefile. It is not included by default. Change-Id: I713617bb58dc218967199248f68da86241d7ec40 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
In Arm platforms the crash console doesn't print anything if the crash happens early enough. This happens in all images, not only BL1. The reason is that they the files ``plat/common/aarch64/platform_helpers.S`` and ``plat/arm/common/aarch64/arm_helpers.S``, and the crash console functions are defined as weak in both files. In practice, the linker can pick the one in ``plat/common``, which simply switches the multi console to crash mode when it wants to initialize the crash console. In the case of Arm platforms, there are no console drivers registered at that point, so nothing is printed. This patch makes the functions in plat/arm strong so that they override the weak functions in plat/common. Change-Id: Id358db7d2567d7df0951790a695636cf6c9ac57f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Even though at this point plat_crash_console_flush is optional, it will stop being optional in a following patch. The console driver of warp7 doesn't support flush, so the implementation is a placeholder. TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but they weren't global so they weren't actually used. Also, they were calling the wrong functions. imx8_helpers.S only has placeholders for all of the functions. Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Non-Arm platforms shouldn't use Arm platform code. This patch copies the implementation of the functions in arm_helpers.S to zynqmp_helpers.S to remove this dependency of zynqmp on Arm platforms. Change-Id: Ia85f303c4c63bcf0ffa57c7f3ef9d88376729b6b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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