Skip to content

GitLab

Switch branch/tag
  1. 26 Jul, 2020 1 commit
    • Manish V Badarkhe's avatar
      SMCCC: Introduce function to check SMCCC function availability · 6f0a2f04
      Manish V Badarkhe authored 
      

Currently, 'SMCCC_ARCH_FEATURES' SMC call handler unconditionally
returns 'SMC_OK' for 'SMCCC_ARCH_SOC_ID' function. This seems to
be not correct for the platform which doesn't implement soc-id
functionality i.e. functions to retrieve both soc-version and
soc-revision.
Hence introduced a platform function which will check whether SMCCC
feature is available for the platform.

Also, updated porting guide for the newly added platform function.

Change-Id: I389f0ef6b0837bb24c712aa995b7176117bc7961
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
      6f0a2f04
  3. 23 Jul, 2020 1 commit
  5. 22 Jul, 2020 1 commit
    • Alexei Fedorov's avatar
      plat/arm/board/fvp: Add support for Measured Boot · 4a135bc3
      Alexei Fedorov authored 
      

This patch adds support for Measured Boot functionality
to FVP platform code. It also defines new properties
in 'tpm_event_log' node to store Event Log address and
it size
'tpm_event_log_sm_addr'
'tpm_event_log_addr'
'tpm_event_log_size'
in 'event_log.dtsi' included in 'fvp_tsp_fw_config.dts'
and 'fvp_nt_fw_config.dts'. The node and its properties
are described in binding document
'docs\components\measured_boot\event_log.rst'.

Change-Id: I087e1423afcb269d6cfe79c1af9c348931991292
Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      4a135bc3
  7. 21 Jul, 2020 3 commits
  9. 10 Jul, 2020 3 commits
  11. 09 Jul, 2020 2 commits
  13. 01 Jul, 2020 1 commit
  15. 30 Jun, 2020 1 commit
  17. 26 Jun, 2020 2 commits
  19. 25 Jun, 2020 3 commits
  21. 24 Jun, 2020 1 commit
    • Sandrine Bailleux's avatar
      Redirect security incident report to TrustedFirmware.org · 1367cc19
      Sandrine Bailleux authored 
      

All projects under the TrustedFirmware.org project now use the same
security incident process, therefore update the disclosure/vulnerability
reporting information in the TF-A documentation.

------------------------------------------------------------------------
/!\ IMPORTANT /!\

Please note that the email address to send these reports to has changed.
Please do *not* use trusted-firmware-security@arm.com anymore.

Similarly, the PGP key provided to encrypt emails to the security email
alias has changed as well. Please do *not* use the former one provided
in the TF-A source tree. It is recommended to remove it from your
keyring to avoid any mistake. Please use the new key provided on
TrustedFirmware.org from now on.
------------------------------------------------------------------------

Change-Id: I14eb61017ab99182f1c45d1e156b96d5764934c1
Signed-off-by: default avatarSandrine Bailleux <sandrine.bailleux@arm.com>
      1367cc19
  23. 23 Jun, 2020 1 commit
  25. 22 Jun, 2020 2 commits
  27. 19 Jun, 2020 2 commits
  29. 15 Jun, 2020 1 commit
  31. 12 Jun, 2020 1 commit
  33. 09 Jun, 2020 2 commits
    • Madhukar Pappireddy's avatar
      plat/fvp: Add support for dynamic description of secure interrupts · 452d5e5e
      Madhukar Pappireddy authored 
      

Using the fconf framework, the Group 0 and Group 1 secure interrupt
descriptors are moved to device tree and retrieved in runtime. This
feature is enabled by the build flag SEC_INT_DESC_IN_FCONF.

Change-Id: I360c63a83286c7ecc2426cd1ff1b4746d61e633c
Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      452d5e5e
    • Andre Przywara's avatar
      GICv3: GIC-600: Detect GIC-600 at runtime · b4ad365a
      Andre Przywara authored 
      

The only difference between GIC-500 and GIC-600 relevant to TF-A is the
differing power management sequence.
A certain GIC implementation is detectable at runtime, for instance by
checking the IIDR register. Let's add that test before initiating the
GIC-600 specific sequence, so the code can be used on both GIC-600 and
GIC-500 chips alike, without deciding on a GIC chip at compile time.

This means that the GIC-500 "driver" is now redundant. To allow minimal
platform support, add a switch to disable GIC-600 support.

Change-Id: I17ea97d9fb05874772ebaa13e6678b4ba3415557
Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      b4ad365a
  35. 06 Jun, 2020 2 commits
  37. 01 Jun, 2020 1 commit
  39. 29 May, 2020 1 commit
  41. 28 May, 2020 1 commit
  43. 27 May, 2020 1 commit
    • Usama Arif's avatar
      plat/arm: Introduce TC0 platform · f5c58af6
      Usama Arif authored 
      

This patch adds support for Total Compute (TC0) platform. It is an
initial port and additional features are expected to be added later.

TC0 has a SCP which brings the primary Cortex-A out of reset
which starts executing BL1. TF-A optionally authenticates the SCP
ram-fw available in FIP and makes it available for SCP to copy.

Some of the major features included and tested in this platform
port include TBBR, PSCI, MHUv2 and DVFS.

Change-Id: I1675e9d200ca7687c215009eef483d9b3ee764ef
Signed-off-by: default avatarUsama Arif <usama.arif@arm.com>
      f5c58af6
  45. 26 May, 2020 1 commit
  47. 25 May, 2020 2 commits
  49. 22 May, 2020 1 commit
  51. 19 May, 2020 2 commits
    • johpow01's avatar
      Enable v8.6 WFE trap delays · 6cac724d
      johpow01 authored 
      

This patch enables the v8.6 extension to add a delay before WFE traps
are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in
plat/common/aarch64/plat_common.c that disables this feature by default
but platform-specific code can override it when needed.

The only hook provided sets the TWED fields in SCR_EL3, there are similar
fields in HCR_EL2, SCTLR_EL2, and SCTLR_EL1 to control WFE trap delays in
lower ELs but these should be configured by code running at EL2 and/or EL1
depending on the platform configuration and is outside the scope of TF-A.
Signed-off-by: default avatarJohn Powell <john.powell@arm.com>
Change-Id: I0a9bb814205efeab693a3d0a0623e62144abba2d
      6cac724d
    • Manish V Badarkhe's avatar
      Cleanup the code for TBBR CoT descriptors · ad43c49e
      Manish V Badarkhe authored 
      

CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c
and tbbr_cot_bl2.c respectively.
Common CoT used across BL1 and BL2 are moved to
tbbr_cot_common.c.
Signed-off-by: default avatarManish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I2252ac8a6960b3431bcaafdb3ea4fb2d01b79cf5
      ad43c49e