- 24 May, 2017 8 commits
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dp-arm authored
Tools are built using the compiler specified in `HOSTCC` instead of reusing the `CC` variable. By default, gcc is used. Change-Id: I83636a375c61f4804b4e80784db9d061fe20af87 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
Since TF uses GCC extensions, switch the C environment from c99 to gnu99. This change allows armclang to build TF. Change-Id: Iaacb2726ba1458af59faf607ae9405d6eedb9962 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
Since ARM_DRAM2_BASE is above the 32-bit limit, the condition is always false. Wrap this condition in an ifndef to avoid warnings during compilation. Change-Id: Ideabb6c65de6c62474ed03eb29df4b049d5316be Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
This function was removed long ago. Remove remaining pragma reference. Change-Id: I66c556863d47dc17d2ffdc6c23aa524df6aade80 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
The default case is impossible to hit as the `power_level` is already checked earlier. Avoids a clang warning. Change-Id: I707463c843adc748ee9aa1d2313f9ab7dab3a8ab Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
Change-Id: I4108ce8d1fe7d3fd51a5a96d43b9134c23b8399b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
x8 is not a callee-saved register and can be corrupted. Use x19 instead to be AAPCS-compliant. Fixes ARM-software/tf-issues#478 Change-Id: Ib4f114c36f4c11351ae856f953c45dca92b27c3b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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danh-arm authored
Collect headers shared between TF and host-tools into include/tools_share
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- 23 May, 2017 4 commits
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Masahiro Yamada authored
The header tbbr_oid.h contains OIDs obtained by ARM Ltd. so there is no good reason to use platform_oid.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Some header files need to be shared between TF and host programs. For fiptool, two headers are copied to the tools/fiptool directory, but it looks clumsy. This commit introduces a new directory, include/tools_share, which collects headers that should be shared between TF and host programs. This will clarify the interface exposed to host tools. We should add new headers to this directory only when we really need to do so. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The current assert_boolean does not work with variables assigned with '=' flavor instead of ':='. For example, FOO = $(BAR) BAR := 1 Here, $(value FOO) is evaluated to $(BAR), not 1. This is not what we expect. While I am here, I simplified the implementation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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- 22 May, 2017 4 commits
- 19 May, 2017 2 commits
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davidcunado-arm authored
Simplify assert() to reduce memory usage
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David Cunado authored
This Linaro release updates just the binaries: Linaro binaries upgraded 16.12 --> 17.01 The toolchain remains at 5.3-2015.05 (gcc 5.3) for both AArch64 and AArch32. The ARM TF codebase has been tested against these new binaries. This patch updates the User Guide to reflect that the 17.01 release is now a supported Linaro Release. Change-Id: I83c579dabd3fa9861ba0d41507036efbd87abcb5 Signed-off-by: David Cunado <david.cunado@arm.com>
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- 18 May, 2017 1 commit
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Antonio Nino Diaz authored
xlat_tables_arch.h uses the platform macro `PLAT_VIRT_ADDR_SPACE_SIZE`. This macro is defined in xlat_tables_private.h only if the platform still uses the deprecated `ADDR_SPACE_SIZE`. Change-Id: I1c3b12ebd96bdfe9bf94b26d440c03bc0f8c0b24 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 17 May, 2017 1 commit
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Jilayne Lovejoy authored
Added note regarding use of SPDX identifiers following this example: https://github.com/pocoproject/poco/blob/develop/LICENSE Change-Id: I22a280bce57f9145e4786c5ad32f663c2c9c6545 Signed-off-by: Jilayne Lovejoy <jilayne.lovejoy@arm.com> Signed-off-by: Dan Handley <dan.handley@arm.com>
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- 16 May, 2017 6 commits
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danh-arm authored
Juno: Fix AArch32 sp_min build
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Soby Mathew authored
The commit abd2aba9 introduced a regression to the AArch32 sp_min Juno build. This patch fixes that. Change-Id: I4b141717684d6aee60c761ea17f23170aa6708c3 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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danh-arm authored
rockchip: rk3328: Add assert check in pmu.c
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danh-arm authored
mbedtls: Namespace update for TF specific macros
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danh-arm authored
Break circular dependency in FVP and Nvidia header files
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Antonio Nino Diaz authored
The behaviour of assert() now depends on the value of the new optional platform define `PLAT_LOG_LEVEL_ASSERT`. This defaults to `LOG_LEVEL` if not defined by the platform. - If `PLAT_LOG_LEVEL_ASSERT` >= `LOG_LEVEL_VERBOSE`, it prints the file name, line and asserted expression. - If `PLAT_LOG_LEVEL_ASSERT` >= `LOG_LEVEL_INFO`, it prints the file name and line. - If not, it doesn't print anything. Note the old behaviour was to print the function name whereas now it prints the file name. This reduces memory usage because the file name is shared between all assert calls in a given file. Also, the default behaviour in debug builds is to no longer print the asserted expression, greatly reducing the string usage. For FVP debug builds this change saves approximately: No TBBR TBBR BL1 1.6 KB 2.2 KB BL2 1.7 KB 2.1 KB BL31 2.6 KB 3.3 KB Change-Id: I2947569d593df0b25611dc3c7a6096f42155c115 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 15 May, 2017 4 commits
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dp-arm authored
No need for these wrapper functions anymore. The compiler-rt builtins provide runtime support for 64-bit division and modulo operations. Change-Id: Ib785d37c86f0c82ebd34c35023a4c1822c03e7df Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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Yatharth Kochar authored
Add support for firmware upgrade on AArch32. This patch has been tested on the FVP models. NOTE: Firmware upgrade on Juno AArch32 is not currently supported. Change-Id: I1ca8078214eaf86b46463edd14740120af930aec Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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dp-arm authored
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode. To build this patch the "mbedtls/include/mbedtls/bignum.h" needs to be modified to remove `#define MBEDTLS_HAVE_UDBL` when `MBEDTLS_HAVE_INT32` is defined. This is a workaround for "https://github.com/ARMmbed/mbedtls/issues/708 " NOTE: TBBR support on Juno AArch32 is not currently supported. Change-Id: I86d80e30b9139adc4d9663f112801ece42deafcf Signed-off-by: dp-arm <dimitris.papastamos@arm.com> Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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tony.xie authored
Add assert() check for cpuson_flags[] and cpuson_entry_point[]. Change-Id: I971fe54c2baa3b4514a3979042341220f5e20901 Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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- 12 May, 2017 9 commits
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davidcunado-arm authored
Minor fixes to the xlat tables lib v2
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David Cunado authored
A previous patch superseded the MBEDTLS_KEY_ALG. This patch updates the ARM platforms to use the new TF_MBEDTLS_KEY_ALG define. Change-Id: Ie0e1bc272e127e879ac58e7cfcbe268751d7688e Signed-off-by: David Cunado <david.cunado@arm.com>
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David Cunado authored
This patch renames MBEDTLS_KEY_ALG to TF_MBEDTLS_KEY_ALG. This completes the migration of TF specific macros so that they do not have the MBEDTLS_ suffix (see arm-trusted-firmware#874). Change-Id: Iad7632477e220b0af987c4db3cf52229fb127d00 Signed-off-by: David Cunado <david.cunado@arm.com>
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David Cunado authored
An earlier patch (arm-trusted-firmware#874) migrated MBEDTLS_ suffixed macros to have a TBBR_ suffix to avoid any potential clash with future mbedtls macros. But on reflection the TBBR_ suffix could be confusing as the macros are used to drive TF-specific configuration of mbedtls. As such this patch migrates these macros from TBBR_suffix to TF_MBEDTLS_ suffix which more accurately conveys their use. Change-Id: Ic87642b653ceeaa03d62f724976abd5e12e867d4 Signed-off-by: David Cunado <david.cunado@arm.com>
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Soby Mathew authored
The current SMC context data structure `smc_ctx_t` and related helpers are optimized for case when SMC call does not result in world switch. This was the case for SP_MIN and BL1 cold boot flow. But the firmware update usecase requires world switch as a result of SMC and the current SMC context helpers were not helping very much in this regard. Therefore this patch does the following changes to improve this: 1. Add monitor stack pointer, `spmon` to `smc_ctx_t` The C Runtime stack pointer in monitor mode, `sp_mon` is added to the SMC context, and the `smc_ctx_t` pointer is cached in `sp_mon` prior to exit from Monitor mode. This makes is easier to retrieve the context when the next SMC call happens. As a result of this change, the SMC context helpers no longer depend on the stack to save and restore the register. This aligns it with the context save and restore mechanism in AArch64. 2. Add SCR in `smc_ctx_t` Adding the SCR register to `smc_ctx_t` makes it easier to manage this register state when switching between non secure and secure world as a result of an SMC call. Change-Id: I5e12a7056107c1701b457b8f7363fdbf892230bf Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
This patch enables compiler-rt for the AArch32 target. The code is not used for AArch64 as the architecture supports the 64-bit division and modulo operations natively. Change-Id: I1703a92872b0bb56ac0b98c67193830683963b13 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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dp-arm authored
These are needed to provide division and modulo operations for the AArch32 target. This code is entirely unmodified. Imported from compiler-rt master branch as of May 4 2017. Change-Id: I001e1809f2afd4bf8d4cc3d2296798809f607144 Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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Sandrine Bailleux authored
For SoCs T132 and T210, the header file 'platform_def.h' used to include 'tegra_def.h' and vice versa. This patch breaks this circular dependency by making 'tegra_def.h' independent. Change-Id: I45a00a84e6ab8b93d5e9242a9ff65f03e9102a96 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
We used to have the following circular dependency in the FVP platform header files: +-> arm_def.h ---> platform_def.h ---> fvp_def.h --+ |__________________________________________________| This patch breaks it by not including 'arm_def.h' from 'fvp_def.h'. Change-Id: I280d906559e3343dd38764029e77c0ea768b4fec Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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- 11 May, 2017 1 commit
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davidcunado-arm authored
Add missing SPDX header
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