- 23 Jan, 2020 1 commit
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Andrew Walbran authored
This lets the Linux kernel or any other image which expects an FDT in x0 be loaded directly as BL33 without a separate bootloader on QEMU. Signed-off-by:Andrew Walbran <qwandor@google.com> Change-Id: Ia8eb4710a3d97cdd877af3b8aae36a2de7cfc654
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- 20 Jan, 2020 7 commits
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Samuel Holland authored
Remove the general BL31 mmap region: it duplicates the existing static mapping for the entire SRAM region. Use the helper definitions when applicable to simplify the code and add the MT_EXECUTE_NEVER flag. Signed-off-by:Samuel Holland <samuel@sholland.org> Change-Id: I7a6b79e50e4b5c698774229530dd3d2a89e94a6d
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Lionel Debieve authored
STM32MP1 platform is able to boot from SPI-NOR devices. These modifications add this support using the new SPI-NOR framework. Change-Id: I75ff9eba4661f9fb87ce24ced2bacbf8558ebe44 Signed-off-by:Lionel Debieve <lionel.debieve@st.com>
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Lionel Debieve authored
STM32MP1 platform is able to boot from SPI-NAND devices. These modifications add this support using the new SPI-NAND framework. Change-Id: I0d5448bdc4bde153c1209e8043846c0f935ae5ba Signed-off-by: -
Lionel Debieve authored
STM32MP1 platform is able to boot from raw NAND devices. These modifications add this support using the new raw NAND framework. Change-Id: I9e9c2b03930f98a5ac23f2b6b41945bef43e5043 Signed-off-by: -
Nicolas Le Bayon authored
For STM32MP1, the address space is 4GB, which can be first divided in 4 parts of 1GB. This LVL1 table is already mapped regardless of MAX_XLAT_TABLES. Fixing typo: Replace Ko to KB. BL2/sp_min for platform STM32MP1 requires 4 MMU translation tables: - a level2 table and a level3 table for identity mapped SYSRAM - a level2 table mapping 2MB of BootROM runtime resources - a level2 table mapping 2MB of secure DDR (case BL32 is OP-TEE) Change-Id: If80cbd4fccc7689b39dd540d6649b1313557f326 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Signed-off-by:
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Lionel Debieve authored
Add a new entry to find register properties by name and include new assert functions to limit address cells to 1 and size cells to 1. Change-Id: Ide59a795a05fb2af36bd07fec15e5a3adf196226 Signed-off-by: -
Nicolas Le Bayon authored
Adds compilation flags to specify which drivers will be embedded in the generated firmware. Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by:
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- 17 Jan, 2020 11 commits
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Varun Wadekar authored
This patch implements a handler to enter the standby state on Tegra194 platforms. On receiving a CPU_STANDBY state request, the platform handler issues TEGRA_NVG_CORE_C6 request to the MCE firmware to take the CPU into the standby state. Change-Id: I703a96ec12205853ddb3c3871b23e338e1f60687 Signed-off-by:Varun Wadekar <vwadekar@nvidia.com>
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Krishna Reddy authored
Force memory transactions from viw and viflar/w as non-coherent from no-override. This is necessary as iso clients shouldn't use coherent path and stage-2 smmu mappings won't mark transactions as non-coherent. For native case, no-override works. But, not for virtualization case. Change-Id: I1a8fc17787c8d0f8579bdaeeb719084993e27276 Signed-off-by:Krishna Reddy <vdumpa@nvidia.com>
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Krishna Reddy authored
Client order id reset values are incorrectly and'ed with mc_client_order_id macro, which resulted in getting reg value as always zero. Updated mc_client_order_id macro to avoid and'ing outside the macro, to take the reg value and update specific bit field as necessary. Change-Id: I880be6e4291d7cd58cf70d7c247a4044e57edd9e Signed-off-by: -
Pritesh Raithatha authored
This patch enable the Memory Controller's "Coalescer" feature to improve performance of memory transactions. Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8 Signed-off-by:Pritesh Raithatha <praithatha@nvidia.com>
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steven kao authored
This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81 instead of SECURE_SCRATCH_RSV44. The previous level bootloader changed this setting, so update here to keep both components in sync. Change-Id: I4e0c1b54fc69482d5513a8608d0bf616677e1bdd Signed-off-by:steven kao <skao@nvidia.com>
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Vignesh Radhakrishnan authored
This patch implements the PSCI system shutdown and reset handlers, that in turn issue the MCE commands. Change-Id: Ia9c831674d7be615a6e336abca42f397e4455572 Signed-off-by:Vignesh Radhakrishnan <vigneshr@nvidia.com>
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Vignesh Radhakrishnan authored
This patch adds support for shutdown/reboot handlers to the MCE driver. ATF communicates with mce using nvg interface for shutdown & reboot. Both shutdown and reboot use the same nvg index. However, the 1st bit of the nvg data argument differentiates whether its a shutdown or reboot. Change-Id: Id2d1b0c4fec55abf69b7f8adb65ca70bfa920e73 Signed-off-by: -
Vignesh Radhakrishnan authored
Currently firmware seems to be checking if we can get into system suspend after checking if CC6 & C7 is allowed. For system suspend to be triggered, the firmware needs to request for CG7 as well. This patch fixes this anomaly. Change-Id: I39c4c50092a4288f4f3fa4b0b1d5026be50f058f Signed-off-by:
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Steven Kao authored
This patch adds a new configuration option to the platform makefiles that disables/enables strict checking mode. The config is enabled by default. Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb Signed-off-by: -
Varun Wadekar authored
This patch cleans the makefile to remove unused platform config options. Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a Signed-off-by: -
Varun Wadekar authored
The stream IDs for XUSB programmed during cold boot are lost on System Suspend. This patch restores the XUSB stream IDs on System Resume. NOTE: THE WARMBOOT CODE NEEDS TO MAKE SURE THAT THE XUSB MODULE IS OUT OF RESET AND THE CLOCKS ARE ENABLED, BEFORE POWERING ON THE CPU, DURING SYSTEM RESUME. Change-Id: Ibd5f1e5ebacffa6b29b625f4c41ecf204afa8191 Signed-off-by:
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- 15 Jan, 2020 21 commits
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Tejas Patel authored
Move pm_client.h to common directory to avoid duplication of function declaration. Signed-off-by:
Tejas Patel <tejas.patel@xilinx.com> Signed-off-by:
Jolly Shah <jolly.shah@xilinx.com> Change-Id: Iea542e681f42db089cccd9b24d286ac8f0a2ce35
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Siva Durga Prasad Paladugu authored
This patch makes default build target as silicon instead of QEMU. The default can be overwritten by specifying it through build flag VERSAL_PLATFORM. Signed-off-by:
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by:
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Siva Durga Prasad Paladugu authored
Add new option for serial and default clock setup. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Signed-off-by:
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Venkatesh Yadav Abbarapu authored
ATF can't fit in current OCM size when the DEBUG is enabled, so increase the OCM size to use 128Kb. Signed-off-by:
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by:
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Siva Durga Prasad Paladugu authored
The IOU switch clock will be set by PLM during boot so there is no need to set here and hence this patch removes it. Signed-off-by:
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Siva Durga Prasad Paladugu authored
This patch modifies cpu clock for Xilinx Versal virtual platform in order to keep same as used by QEMU. Signed-off-by:
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Saeed Nowshadi authored
This patch adds EEMI support for PM_GET_OPERATING_CHARACTERISTIC api id. This interface obtains operating characteristic of a device from PMC firmware. The 'power', 'temperature', and 'latency' characteristic are the options that are supported. Signed-off-by:
Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by:
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Ravi Patel authored
Add support for Get_ChipID API in Versal which calls corresponding LibPM API. Signed-off-by:
Ravi Patel <ravi.patel@xilinx.com> Acked-by:
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Jolly Shah authored
This patch adds support for load pdi api to enable loading pdi from linux. Signed-off-by: -
Ravi Patel authored
Add API to check availability of given API in ATF as well as platform management controller and returns the supported version number. Signed-off-by:
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Tejas Patel authored
Add support to set wakeup source for APU while suspending. Signed-off-by:
Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by:
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Rajan Vaja authored
Add GET_CALLBACK_DATA function to get IPI callback data in Linux during init suspend callback. Signed-off-by:
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Saeed Nowshadi authored
Add following APIs in plat_psci to support system shutdown & reset: - versal_system_off - versal_system_reset Signed-off-by:
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Tejas Patel authored
Add following APIs in plat_psci to support suspend resume: - versal_pwr_domain_off - versal_pwr_domain_suspend - versal_pwr_domain_suspend_finish - versal_validate_power_state - versal_get_sys_suspend_power_state Signed-off-by:
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Tejas Patel authored
Add PMC ops for power domain ON and remove no_pmc ops. Signed-off-by:
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Tejas Patel authored
Implement set wakeup source API to pass SMC call for set wakeup source to PLM (Platform Loader and Manager). Signed-off-by:
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Tejas Patel authored
Implement client wakeup API for versal. Signed-off-by:
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Tejas Patel authored
Add PM_QUERY_DATA API to pass query data EEMI call from Linux to PLM . Signed-off-by:
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Tejas Patel authored
Implement request wakeup API for versal. Signed-off-by:
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Tejas Patel authored
PM_INIT_FINALIZE is not required for versal. To use Linux Zynqmp PM driver for versal, handle PM_INIT_FINALIZE API in ATF for versal by always returning SUCCESS. Signed-off-by:
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Tejas Patel authored
PM_GET_TRUSTZONE_VERSION API is required to use zynqmp-firmware driver for versal. Add support of PM_GET_TRUSTZONE_VERSION API for versal. Signed-off-by:
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