1. 19 May, 2020 1 commit
    • Alexei Fedorov's avatar
      FVP: Add support for passing platform's topology to DTS · 003faaa5
      Alexei Fedorov authored
      
      
      This patch adds support for passing FVP platform's topology
      configuration to DTS files for compilation, which allows to
      build DTBs with correct number of clusters and CPUs.
      This removes non-existing clusters/CPUs from the compiled
      device tree blob and fixes reported Linux errors when trying
      to power on absent CPUs/PEs.
      If DTS file is passed using FVP_HW_CONFIG_DTS build option from
      the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER
      and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will
      use the default values from the corresponding DTS file.
      
      Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      003faaa5
  2. 15 May, 2020 1 commit
  3. 11 Mar, 2020 1 commit
    • Madhukar Pappireddy's avatar
      fconf: Extract topology node properties from HW_CONFIG dtb · 4682461d
      Madhukar Pappireddy authored
      
      
      Create, register( and implicitly invoke) fconf_populate_topology()
      function which extracts the topology related properties from dtb into
      the newly created fconf based configuration structure 'soc_topology'.
      Appropriate libfdt APIs are added to jmptbl.i file for use with USE_ROMLIB
      build feature.
      
      A new property which describes the power domain levels is added to the
      HW_CONFIG device tree source files.
      
      This patch also fixes a minor bug in the common device tree file
      fvp-base-gicv3-psci-dynamiq-common.dtsi
      As this file includes fvp-base-gicv3-psci-common.dtsi, it is necessary
      to delete all previous cluster node definitons because DynamIQ based
      models have upto 8 CPUs in each cluster. If not deleted, the final dts
      would have an inaccurate description of SoC topology, i.e., cluster0
      with 8 or more core nodes and cluster1 with 4 core nodes.
      
      Change-Id: I9eb406da3ba4732008a66c01afec7c9fa8ef59bf
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      4682461d
  4. 13 Feb, 2020 1 commit
  5. 14 Jan, 2020 1 commit
    • Balint Dobszay's avatar
      Replace dts includes with C preprocessor syntax · 2d51b55e
      Balint Dobszay authored
      
      
      Using the /include/ syntax, the include was evaluated by dtc, only after running
      the preprocessor, therefore the .dtsi files were not preprocessed. This patch
      adds the #include syntax instead. Evaluating this and preprocessing the files
      now happens in a single step, done by the C preprocessor.
      
      Change-Id: I6d0104b6274316fc736e84973502a4d6c2c9d6e0
      Signed-off-by: default avatarBalint Dobszay <balint.dobszay@arm.com>
      2d51b55e
  6. 24 Apr, 2018 1 commit
    • Roberto Vargas's avatar
      Remove dtc warnings · e230f4d5
      Roberto Vargas authored
      
      
      DTC generates warnings when unit names begin with 0, or
      when a node containing a reg or range property doesn't have a unit name
      in the node name. This patch fixes those cases.
      
      Change-Id: If24ec68ef3034fb3fcefb96c5625c47a0bbd8474
      Signed-off-by: default avatarRoberto Vargas <roberto.vargas@arm.com>
      e230f4d5
  7. 01 Aug, 2017 1 commit
    • Jeenu Viswambharan's avatar
      Add Linux DTS for FVP with threaded CPUs · 1bdbdc3b
      Jeenu Viswambharan authored
      
      
      In contrast with the non-multi-threading DTS, this enumerates MPIDR
      values shifted by one affinity level to the left. The newly added DTS
      reflects CPUs with a single thread in them.
      
      Since both DTS files are the same apart from MPIDR contents, the common
      bits have been moved to a separate file that's then included from the
      top-level DTS files. The multi-threading version only updates the MPIDR
      contents.
      
      Change-Id: Id225cd93574f764171df8962ac76f42fcb6bba4b
      Signed-off-by: default avatarJeenu Viswambharan <jeenu.viswambharan@arm.com>
      1bdbdc3b
  8. 01 Jun, 2017 1 commit
    • Achin Gupta's avatar
      Device tree changes to boot FreeBSD on FVPs · 8d2c4977
      Achin Gupta authored
      
      
      FreeBSD does not understand #interrupt-map in a device tree. This prevents the
      GIC from being set up correctly. This patch removes the #interrupt-map in the
      device trees for the Base and Foundation FVPs. This enables correct boot of
      FreeBSD on these platforms.
      
      These changes have been tested with FreeBSD and an Ubuntu cloud image
      (ubuntu-16.04-server-cloudimg-arm64-uefi1.img) to ensure compatibility with
      Linux.
      
      Change-Id: I1347acdcf994ec4b1dd843ba32af9951aa54db73
      Signed-off-by: default avatarAchin Gupta <achin.gupta@arm.com>
      8d2c4977
  9. 11 Oct, 2016 1 commit
    • Soby Mathew's avatar
      Fix GICv3 DT to include psci system off/reset · 78c4f192
      Soby Mathew authored
      The `fvp-base-gicv3-psci` and `fvp-foundation-gicv3-psci` device tree source
      files did not have psci node entries for `system off` and `system reset`.
      Also the DTS files included `rtsm_ve-motherboard-no_psci.dtsi` instead of
      `rtsm_ve-motherboard.dtsi`. As a result, the Linux kernel failed to invoke
      the PSCI_SYSTEM_OFF/RESET API when being shutdown/reset. This patch corrects
      this problem and also updates the corresponding DTB files.
      
      This patch also removes `rtsm_ve-motherboard-no_psci.dtsi` and
      `fvp-foundation-motherboard-no_psci.dtsi` files as they are no longer used.
      
      Change-Id: I8ba61a1323035f7508cae663bb490ac0e8a64618
      78c4f192
  10. 03 Mar, 2016 1 commit
    • Antonio Nino Diaz's avatar
      Add cache topology info to FVP DTBs · b1063d95
      Antonio Nino Diaz authored
      From version 4.0 onwards, the ARM64 Linux kernel expects the device
      tree to indicate the cache hierarchy. Failing to provide this
      information results in the following warning message to be printed by
      the kernel:
      
          `Unable to detect cache hierarchy from DT for CPU x`
      
      All the FVP device trees provided in the TF source tree have been
      modified to add this information.
      
      Fixes ARM-software/tf-issues#325
      
      Change-Id: I0ff888992e602b81a0fe1744a86151d625727511
      b1063d95
  11. 29 Apr, 2015 1 commit
    • Juan Castillo's avatar
      FVP: update device tree idle state entries · 6136f372
      Juan Castillo authored
      Device tree idle state bindings changed in kernel v3.18. This patch
      updates the FVP DT files to use PSCI suspend as idle state.
      
      The patch also updates the 'compatible' property in the PSCI node
      and the 'entry-method' property in the idle-states node in the FVP
      Foundation GICv2-legacy device tree.
      
      Change-Id: Ie921d497c579f425c03d482f9d7b90e166106e2f
      6136f372
  12. 26 Jan, 2015 1 commit
    • Soby Mathew's avatar
      Increment the PSCI VERSION to 1.0 · e8ca7d1e
      Soby Mathew authored
      This patch:
      
         * Bumps the PSCI VERSION to 1.0. This means that
           the PSCI_VERSION API will now return the value 0x00010000
           to indicate the version as 1.0. The firmware remains
           compatible with PSCI v0.2 clients.
      
         * The firmware design guide is updated to document the
           APIs supported by the Trusted Firmware generic code.
      
         * The FVP Device Tree Sources (dts) and Blobs(dtb) are also
           updated to add "psci-1.0" and "psci-0.2" to the list of
           compatible PSCI versions.
      
      Change-Id: Iafc2f549c92651dcd65d7e24a8aae35790d00f8a
      e8ca7d1e
  13. 20 Aug, 2014 1 commit
    • Achin Gupta's avatar
      FVP: Update device trees to match cpuidle driver · bab7bfd2
      Achin Gupta authored
      This patch updates the representation of idle tables and cpu/cluster topology in
      the device tree source files for the FVP to what the latest cpuidle driver in
      Linux expects. The device tree binaries have also been updated.
      
      Change-Id: If0668b96234f65aa0435fba52f288c9378bd8824
      bab7bfd2
  14. 19 Aug, 2014 1 commit
    • Juan Castillo's avatar
      Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs · d5f13093
      Juan Castillo authored
      This patch adds support for SYSTEM_OFF and SYSTEM_RESET PSCI
      operations. A platform should export handlers to complete the
      requested operation. The FVP port exports fvp_system_off() and
      fvp_system_reset() as an example.
      
      If the SPD provides a power management hook for system off and
      system reset, then the SPD is notified about the corresponding
      operation so it can do some bookkeeping. The TSPD exports
      tspd_system_off() and tspd_system_reset() for that purpose.
      
      Versatile Express shutdown and reset methods have been removed
      from the FDT as new PSCI sys_poweroff and sys_reset services
      have been added. For those kernels that do not support yet these
      PSCI services (i.e. GICv3 kernel), the original dtsi files have
      been renamed to *-no_psci.dtsi.
      
      Fixes ARM-software/tf-issues#218
      
      Change-Id: Ic8a3bf801db979099ab7029162af041c4e8330c8
      d5f13093
  15. 22 May, 2014 1 commit
    • Juan Castillo's avatar
      Reserve some DDR DRAM for secure use on FVP platforms · 364daf93
      Juan Castillo authored
      TZC-400 is configured to set the last 16MB of DRAM1 as secure memory and
      the rest of DRAM as non-secure. Non-secure software must not attempt to
      access the 16MB secure area.
      
      Device tree files (sources and binaries) have been updated to match this
      configuration, removing that memory from the Linux physical memory map.
      
      To use UEFI and Linux with this patch, the latest version of UEFI and
      the updated device tree files are required. Check the user guide in the
      documentation for more details.
      
      Replaced magic numbers with #define for memory region definition in the
      platform security initialization function.
      
      Fixes ARM-software/tf-issues#149
      
      Change-Id: Ia5d070244aae6c5288ea0e6c8e89d92859522bfe
      364daf93
  16. 24 Apr, 2014 1 commit
    • Harry Liebel's avatar
      Enable secure memory support for FVPs · f2199d95
      Harry Liebel authored
      - Use the TrustZone controller on Base FVP to program DRAM access
        permissions. By default no access to DRAM is allowed if
        'secure memory' is enabled on the Base FVP.
      - The Foundation FVP does not have a TrustZone controller but instead
        has fixed access permissions.
      - Update FDTs for Linux to use timers at the correct security level.
      - Starting the FVPs with 'secure memory' disabled is also supported.
      
      Limitations:
      Virtio currently uses a reserved NSAID. This will be corrected in
      future FVP releases.
      
      Change-Id: I0b6c003a7b5982267815f62bcf6eb82aa4c50a31
      f2199d95
  17. 17 Jan, 2014 1 commit
  18. 05 Dec, 2013 1 commit
    • Dan Handley's avatar
      Enable third party contributions · ab2d31ed
      Dan Handley authored
      - Add instructions for contributing to ARM Trusted Firmware.
      
      - Update copyright text in all files to acknowledge contributors.
      
      Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
      ab2d31ed
  19. 27 Nov, 2013 1 commit
  20. 14 Nov, 2013 1 commit
    • Harry Liebel's avatar
      Add GICv3 ITS to FDTs · 3498859b
      Harry Liebel authored
      - The interrupt addresses need to be updated to work.
      
      Change-Id: Icdd00177095ae9e4eb7b13718762f92e29b1465c
      3498859b
  21. 25 Oct, 2013 1 commit