- 01 Feb, 2016 1 commit
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danh-arm authored
update SPM/DCM/MTCMOS related code for power control logic
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- 26 Jan, 2016 7 commits
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Fan Chen authored
We found sometimes mtcmos operation is too long in spm (>1ms), so update a new version to fix it. I verified with 5 hours power_LoadTest, every mtcmos control can finish in 500us (average is 100~200us). Change-Id: I47b712bf9898870f4abcecbea47e01b9786231d4 Signed-off-by: Fan Chen <fan.chen@mediatek.com>
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Weiyi Lu authored
1. Set more wakeup source 2. Update PCM code for control logic Change-Id: I2ad06bd85bd1c75a22c838eab4cf5566c443b89a Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
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Jimmy Huang authored
1. Add SiP calls for subsystem power on/off and check support 2. Add subsystem power control related initialization in bl31_plat_setup.c 3. Add subsystem power on/off and power ack waiting functions 4. Update PCM code for subsystem physical power control logic Change-Id: Ia0ebb1964c8f9758159bcf17c1813d76ef52cf64 Signed-off-by: yt.lee <yt.lee@mediatek.com>
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Jimmy Huang authored
1. add power control for both big and Little cluster in MCDI 2. fix incorrect PCM_HOTPLUG_VALID_MASK in spm_hotplug.c 3. check the power status of cpus in cluster before setting the cputop power control Change-Id: Ifa85306a8bc218098667247904d281494c2f7bfe Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
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Jimmy Huang authored
Move SPM related PLL settings to spm_boot_init in ARM TF SPM driver Change-Id: I414b896caae072570c8de33a25e06db4ae011f57 Signed-off-by: yt.lee <yt.lee@mediatek.com>
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Jimmy Huang authored
This patch updates SPM driver settings and PCM code to fix USB remote wake up problem. Change-Id: I07a81cc64b1d226d111380580d09ae25879f4285 Signed-off-by: yt.lee <yt.lee@mediatek.com>
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Jimmy Huang authored
This patch enables dynamic clock management control to reduce power consumption in various components. Change-Id: I8f66d9b72c8b1d70169ffe46cc361b16a0dadb77 Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
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- 25 Jan, 2016 2 commits
- 20 Jan, 2016 2 commits
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Soren Brinkmann authored
Use the form with underscores to define the '__deprecated' macro to avoid collisions with potentially defined macros, as suggested in gcc docs (https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html#Attribute-Syntax ). Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Juan Castillo authored
Currently, Trusted Firmware on ARM platforms unlocks access to the timer frame registers that will be used by the Non-Secure world. This unlock operation should be done by the Non-Secure software itself, instead of relying on secure firmware settings. This patch adds a new ARM specific build option 'ARM_CONFIG_CNTACR' to unlock access to the timer frame by setting the corresponding bits in the CNTACR<N> register. The frame id <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID'. Default value is true (unlock timer access). Documentation updated accordingly. Fixes ARM-software/tf-issues#170 Change-Id: Id9d606efd781e43bc581868cd2e5f9c8905bdbf6
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- 18 Jan, 2016 2 commits
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danh-arm authored
Update doc links in the porting guide
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Yuping Luo authored
GIC v2 and v3 specification references in the porting guide should refer to publically visible links, not ARM internal links. Change-Id: Ib47c8adda6a03581f23bcaed72d71c08c7dd9fb1 Signed-off-by: Yuping Luo <yuping.luo@arm.com>
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- 15 Jan, 2016 3 commits
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danh-arm authored
Doc: Update out-dated info about Juno's mailbox
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danh-arm authored
Clean up __attribute__ usage
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Sandrine Bailleux authored
Since commit 804040d1, the Juno port has moved from per-CPU mailboxes to a single shared one. This patch updates an out-dated reference to the former per-CPU mailboxes mechanism in the Firmware Design. Change-Id: I355b54156b1ace1b3df4c4416e1e8625211677fc
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- 14 Jan, 2016 4 commits
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Soren Brinkmann authored
Migrate all direct usage of __attribute__ to usage of their corresponding macros from cdefs.h. e.g.: - __attribute__((unused)) -> __unused Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Use the new __deprecated macro from the generic cdefs header and remove the deprecated __warn_deprecated. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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Soren Brinkmann authored
Introduce a macro to mark functions as deprecated. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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danh-arm authored
FVP: Compile ARM Cortex-A72 CPU support in
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- 13 Jan, 2016 9 commits
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danh-arm authored
Add 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide
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danh-arm authored
cert_create: update help message
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danh-arm authored
Rearrange fields in TF data structures to reduce padding
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danh-arm authored
Add support for ARM Cortex-A35 processor
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danh-arm authored
Various documentation fixes
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Juan Castillo authored
This patch adds a brief description of 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide. These fields must be defined by the platform in order to use the translation table library. Change-Id: Ida366458fe2bc01979091a014dc38da0fae5991e
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Soby Mathew authored
This patch rearranges fields of the `image_desc_t` & `auth_img_desc_t` data structures to reduce padding between the fields and thereby save memory. NOTE: Platform ports which anonymously initialize these structures should be aware of the rearrangement and do the required modification. Change-Id: I428b5429632797b31d5bd306174599c07e24c060
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Soby Mathew authored
This patch changes the anonymous initialization of `rt_svc_desc_t` structure by the `DECLARE_RT_SVC` macro to designated initialization. This makes the code more robust and less sensitive to potential changes to the `rt_svc_desc_t` structure. Change-Id: If6f1586730c0d29d92ef09e07eff7dd0d22857c7
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Sandrine Bailleux authored
This patch enables the ARM Cortex-A72 support in BL1 and BL31 on FVP. This allows the same TF binaries to run on a Cortex-A72 based FVP without recompiling them. Change-Id: I4eb6bbad9f0e5d8704613f7c685c3bd22b45cf47
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- 12 Jan, 2016 2 commits
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Sandrine Bailleux authored
Change-Id: I4fcdb8e813e0392c2cd3d0623698e8319b3b0593
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Sandrine Bailleux authored
This patch adds support for ARM Cortex-A35 processor in the CPU specific framework, as described in the Cortex-A35 TRM (r0p0). Change-Id: Ief930a0bdf6cd82f6cb1c3b106f591a71c883464
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- 08 Jan, 2016 1 commit
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Sandrine Bailleux authored
This patch fixes a couple of issues in the "CPU specific operations framework" section in the Firmware Design document. * Fix broken link to the CPU Specific Build Macros document. * Fix the path to the cortex_a53.S file. * Fix power levels terminology. Change-Id: Ib610791eaba13dab2823b7699bb63534bcd1c8fb
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- 07 Jan, 2016 1 commit
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Juan Castillo authored
The help message printed by the cert_create tool using the command line option -h (or --help) does not correctly list all the available command line options. This patch reworks the print_help() function to print the help messages in a data driven approach. For each command line option registered, an optional help message can be specified, which will be printed by print_help(). Help messages for the TBBR options (certificates, keys and images) are also provided. Fix a small bug in the short options string passed to getopt_long: the ':' was missing in the '-a' option (this option must take an argument). Fixes ARM-software/tf-issues#337 Change-Id: I9d08c2dfd349022808fcc884724f677eefdc1452
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- 06 Jan, 2016 3 commits
- 05 Jan, 2016 2 commits
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Juan Castillo authored
The fip_create tool specifies images in the command line using the ARM TF naming convention (--bl2, --bl31, etc), while the cert_create tool uses the TBBR convention (--tb-fw, --soc-fw, etc). This double convention is confusing and should be aligned. This patch updates the fip_create command line options to follow the TBBR naming convention. Usage examples in the User Guide have been also updated. NOTE: users that build the FIP by calling the fip_create tool directly from the command line must update the command line options in their scripts. Users that build the FIP by invoking the main ARM TF Makefile should not notice any difference. Change-Id: I84d602630a2585e558d927b50dfde4dd2112496f
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Sandrine Bailleux authored
By default ARM TF is built with the '-pedantic' compiler flag, which helps detecting violations of the C standard. However, the mbed TLS library and its associated authentication module in TF used to fail building with this compiler flag. As a workaround, the mbed TLS authentication module makefile used to set the 'DISABLE_PEDANTIC' TF build flag. The compiler errors flagged by '-pedantic' in the mbed TLS library have been fixed between versions 1.3.9 and 2.2.0 and the library now properly builds with this compiler flag. This patch fixes the remaining compiler errors in the mbed TLS authentication module in TF and unsets the 'DISABLE_PEDANTIC' TF build flag. This means that TF is now always built with '-pedantic'. In particular, this patch: * Removes the final semi-colon in REGISTER_COT() macro. This semi-colon was causing the following error message: drivers/auth/tbbr/tbbr_cot.c:544:23: error: ISO C does not allow extra ';' outside of a function [-Werror=pedantic] This has been fixed both in the mbed TLS authentication module as well as in the certificate generation tool. Note that the latter code didn't need fixing since it is not built with '-pedantic' but the change has been propagated for consistency. Also fixed the REGISTER_KEYS() and REGISTER_EXTENSIONS() macros, which were suffering from the same issue. * Fixes a pointer type. It was causing the following error message: drivers/auth/mbedtls/mbedtls_crypto.c: In function 'verify_hash': drivers/auth/mbedtls/mbedtls_crypto.c:177:42: error: pointer of type 'void *' used in arithmetic [-Werror=pointer-arith] Change-Id: I7b7a04ef711efd65e17b5be26990d1a0d940257d
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- 04 Jan, 2016 1 commit
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Jimmy Huang authored
The 'ret' was missing in console_uninit() implementation, so the program doesn't return from console_uninit(). Instead, it keeps executing the following instructions which is not expected. Change-Id: I810684f37f61c41c6f95a3bb36914d0765da8571 Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
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