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The retries number should be 3.
A warning message is added in mmc_block_read(), and the code is refactored.

Change-Id: I577c7dd91c451c7580b1660042cb5fe26ee3fa12
Signed-off-by: Yann Gautier <yann.gautier@st.com>

nand_wait_ready is called with a millisecond delay
but the timeout used a micro second. Fixing the conversion
in the timeout call.
The prototype of the function is also changed to use an unsigned int
parameter.

Change-Id: Ia3281be7980477dfbfdb842308d35ecd8b926fb8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Change the detection message from WARN to INFO when macronix
NOR is detected.

Change-Id: I488696f1fb75b823e85decfcd6cd32e7b36a6c2e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

The call to fdt_get_status(node) has to be done after the DT is found
to be valid.

Fixes: 1fc2130c

 stm32mp1: update device tree and gpio functions

Change-Id: I70f803aae3dde128a9e740f54c8837b64cb1a244
Signed-off-by: Yann Gautier <yann.gautier@st.com>

While restarting a new hash computation, STR register
is not cleared. It needs to be written before each
computation.

Change-Id: If65902dd21f9c139ec5da3ca87721232f73710db
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

From commit: 21571b1d140ae7bb44e94c0afba2ec61456b275b
Made small changes to fit into TF-A project

Change-Id: I991f653a7ace04f9c84bcda78ad8d7114ea18e93
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

* changes:
  plat: tegra: Use generic ehf defines
  ehf: use common priority level enumuration

Remote chip  ITS, SMMU, PCIe nodes are added for enabling remote
chip PCIe hierarchy.

Change-Id: I5b3ca733715defa38e413588ccd13d0688cba271
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>

* changes:
  plat/arm: fvp: Increase BL2 maximum size
  lib: fconf: Implement a parser to populate CoT

According to [1] and in context of FF-A v1.0 a secure partition must
have either one EC (migratable UP) or a number of ECs equal to the
number of PEs (pinned MP). Adjust the SPMC manifest such that the
number of ECs is equal to the number of PEs.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/components/


secure-partition-manager.html#platform-topology
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ie8c7d96ae7107cb27f5b97882d8f476c18e026d4

Increased BL2 maximum size when CoT descriptors are placed
in device tree.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6466d2841e189e7f15eb4f1a8db070542893cb5b

Implemented a parser which populates the properties of
the CoT descriptors as per the binding document [1].
'COT_DESC_IN_DTB' build option is disabled by default and can
be enabled in future for all Arm platforms by making necessary
changes in the memory map.
Currently, this parser is tested only for FVP platform.

[1]:
https://trustedfirmware-a.readthedocs.io/en/latest/components/cot-binding.html



Change-Id: I2f911206087a1a2942aa728de151d2ac269d27cc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

* changes:
  Update makefile to build fiptool for Windows
  Fix fiptool packaging issue on windows

Change-Id: Iedaa83ed546eb2476849a8d53f6e05b847a48b23
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>

Currently the feature test for the SPE extension requires the feature
bits in the ID_AA64DFR0 register to read exactly 0b0001.
However the architecture guarantees that any values greater than 0
indicate the presence of a feature, which is what we are after in
our spe_supported() function.

Change the comparison to include all values greater than 0.

This fixes SPE support in non-secure world on implementations which
include the Scalable Vector Extension (SVE), for instance on Zeus cores.

Change-Id: If6cbd1b72d6abb8a303e2c0a7839d508f071cdbe
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Loop macros make it easier for developers to include new variables to
assert or define and also help code code readability on makefiles.

Change-Id: I0d21d6e67b3eca8976c4d856ac8ccc02c8bb5ffa
Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>

Although support for building fiptool on a Windows host was present,
the binary was not built when the top level makefile was invoked.

This patch makes the necessary changes to the to support building of
fiptool on a Windows host PC from the main makefile.

Change-Id: I0c01ba237fa3010a027a1b324201131210cf4d7c
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>

Windows does not have a standard getopt implementation. To address
this an equivalent implementation has been provided in win_posix.c
However, the implementation has an issue with option processing as
described below.

Long option names may be abbreviated if the abbreviation is unique
or an exact match for some defined option.
Since some options can be substring of other options e.g. "scp-fw"
option is a substring of "scp-fwu-cfg", we need to identify if an
option is abbreviated and also check for uniqueness. Otherwise if
a user passes --scp-fw as an option, the "scp-fwu-cfg" option may
get selected, resulting in an incorrectly packaged FIP.

This issue has been be fixed by:
  - First searching for an exact match.
  - If exact match was not found search for a abbreviated match.
By doing this an incorrect option selection can be avoided.

Change-Id: I22f4e7a683f3df857f5b6f0783bf9b03a64a0bcc
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>

To avoid trapping from EL0/1, FPEN bits need to be set 0x3, not
clearing.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: Ic34e9aeb876872883c5f040618ed6d50f21dacd0

It uses the existing implementation of snprintf() function

Change-Id: Ie59418564c2e415222e819cf322c34e9a4d1f336
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Neoverse N1 erratum 1868343 is a Cat B erratum, present in older
revisions of the Neoverse N1 processor core.  The workaround is to
set a bit in the CPUACTLR_EL1 system register, which delays instruction
fetch after branch misprediction. This workaround will have a small
impact on performance.

SDEN can be found here:
https://documentation-service.arm.com/static/5f2c130260a93e65927bc92f

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I37da2b3b2da697701b883bff9a1eff2772352844