- 26 May, 2021 1 commit
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Rex-BC Chen authored
MTK display port mute/unmute control registers need to be set in secure world. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Iec73650e937bd20e25c18fa28d55ae29e68b10d3
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- 23 Apr, 2021 14 commits
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Yidi Lin authored
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the driver with mt8195. Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
mt8195 also uses PMIC mt6359p. The only difference is the pwrap register definition. Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Add system_reset function in PSCI ops Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I177796e30198b0a53402093ee0917dda43074385
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mtk20895 authored
Add gpio driver. Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com> Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
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Yidi Lin authored
Add the basic SiP service Change-Id: I21fe9d85eac4be9101b12c4b6c28294c5b93cb5f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I1321f7989c8a3d116d698768a7146e8f180ee9c0
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James Liao authored
Add MCDI related drivers to handle CPU powered on/off in CPU suspend. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3fc206437de7ad8
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James Liao authored
Add SPMC driver for CPU power on/off. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: If47d7f3f3b9965f3c0402ea6cdb917ad1d16bb32
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Yidi Lin authored
Initialize delay_timer for delay functions. Change-Id: Ib554135151f8b5c642b5a6511c942bb9efc0a47f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Change-Id: I7e0fbd04b0cdf5da92b8ef39737342f2d66f5f10 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
The timer driver can be shared with mt8195. Move the the timer driver to common/. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I84c97ab9cc9b469f35e0f44dd8e7b2b95f1b3926
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gtk_pangao authored
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common common folder. Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com> Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
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christine.zhu authored
MT8192 GIC driver can be shared with MT8195. Move GIC driver to common and do the initialization. Signed-off-by: christine.zhu <christine.zhu@mediatek.corp-partner.google.com> Change-Id: I63f3e668b5ca6df8bcf17b5cd4d53fa84f330fed
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Yidi Lin authored
- Add basic platform setup - Add MT8195 documentation at docs/plat/ - Add generic CPU helper functions - Add basic register address Change-Id: I7978e2f32e58900e5cf93f741ee8eaf8b8e3b842 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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- 20 Apr, 2021 1 commit
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Nina Wu authored
Add devapc driver for setting default permission. Change-Id: I103f27ae090fbed76ce9319606ac082d78b74566 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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- 15 Apr, 2021 1 commit
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Yidi Lin authored
UART register definition is the same on MediaTek platforms. Move uart.h to common folder and remove the duplicate file. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: Iea0931dfd606ae4a7ab475b9cb3a08dc6de68b36
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- 08 Mar, 2021 1 commit
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Roger Lu authored
The case for value "VCOREFS_SMC_CMD_INIT" is not terminated by a "break" statement. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: I56cc7c1648e101c0da6e77e592e6edbd5d37724e
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- 03 Mar, 2021 5 commits
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Xi Chen authored
1 Only enable domain D0 and D1:PCIe access 0xC0000000~0xC4000000; 2 Only enable domain D0 and D3(SCP) access 0x50000000~0x51400000; Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: Ic4f9e6d85bfd1cebdb24ffc1d14309c89c103b2a
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Roger Lu authored
Change-Id: I4bd4612a7c7727a5be70957ae940e5f51c7ca5e6 Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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Roger Lu authored
Supports dram/mainpll/26m off when system suspend Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: Id13a06d4132f00fb60066de75920ecac18306e32
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Roger Lu authored
Signed-off-by: Roger Lu <roger.lu@mediatek.com> Change-Id: I0ea7f61085ea9ba26c580107ef0cb9940a25f5e2
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Roger Lu authored
Low Power Management (LPM) helps find a suitable configuration for letting system entering idle or suspend with the most resources off. Change-Id: Ie6a7063b666cf338cff5bc972c9025b26de482eb Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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- 16 Dec, 2020 4 commits
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Yuchen Huang authored
add mt6359p rtc power off sequence and enable k_eosc mode Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Change-Id: I65450c63c44ccb5082541dbbe28b8aa0a95ecc56
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Yidi Lin authored
CID 364146: Control flow issues (DEADCODE) Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL are equal on mt8192, the following equation never hold. if (aff_lvl > PLAT_MAX_PWR_LVL) { return PSCI_E_INVALID_PARAMS; } Remove the deadcode to comply with MISRA standard. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398
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Yidi Lin authored
CID 364144: Integer handling issues (NO_EFFECT) The unsigned value is always greater-than-or-equal-to-zero. Remove such check. Change-Id: Ia395eb32f55a7098d2581ce7f548b7e1112beaa0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Xi Chen authored
1 Add Domain1(PCIe device) protect address: 0x80000000~0x83FF0000. 2 Add Domain2(SSPM/SPM/DPM/MCUPM) protect address: 0x40000000~0x1FFFF0000. Signed-off-by: Xi Chen <xixi.chen@mediatek.com> Change-Id: I4aaed37150076ae5943484c4adadac999a3d1762
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- 07 Dec, 2020 12 commits
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Nina Wu authored
1. Add mcusys related dcm drivers 2. Turn on mcusys-related dcm by default Change-Id: Ibbee37c87cc38e7a6cd7c93c2fc0817aad6dbe95 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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elly.chiang authored
enable PTP3 for protecting sysPi Signed-off-by: elly.chiang <elly.chiang@mediatek.com> Change-Id: Ic3a13c8314f829dca8547861b98639d1d9444eb2
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Nina Wu authored
Add the basic SiP service Change-Id: Ib7f2380aab910adf8d33498a79ecd287273907c5 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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Yuchen Huang authored
When system resume, we want to print log as soon as possible. So we add uart save and restore api, and they will be called when systtem suspend and resume. Change-Id: I83b477fd2b39567c9c6b70534ef186993f7053ae Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com>
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G.Pangao authored
1.Modify this driver to make it more complete and more standard. 2.And makes this driver available for more IC services. 3.Solve some bugs in the software. Signed-off-by: G.Pangao <gtk_pangao@mediatek.com> Change-Id: I284956d47ebbbd550ec93767679181185e442348
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Hsin-Hsiung Wang authored
add power-off support Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: If19e99971515a8ae1ac9ae21046e4382adc18a69
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Hsin-Hsiung Wang authored
add pmic mt6359p driver Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Change-Id: I20f2218f7d2087e8d2bf31258cf92a02e0dab77d
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Nina Wu authored
Init delay_timer for the use of delay functions Change-Id: I35aefd7515bb9259634c8b6bc37d8c74da96e8f1 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
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Dehui Sun authored
Enable NS access for all systimers. Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> Change-Id: I3693997082a1d6f09fef5a79b6cf5a91be46cb8a
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Change-Id: I31abfc752b69ac40e70bc9e7a55163eb39776c44 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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James Liao authored
Add MCDI related drivers to handle CPU powered on/off in CPU suspend. Change-Id: I5110461e8eef86f8383b45f197ec5cb10dbfeb3e Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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James Liao authored
Add SPMC driver for CPU power on/off. Change-Id: I526b98d5885855efce019dd09cfd93b8816cbf19 Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
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- 28 Oct, 2020 1 commit
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Dehui Sun authored
add timer driver. Signed-off-by: Dehui Sun <dehui.sun@mediatek.com> Change-Id: I07448d85a15bb14577b05e4f302860d609420ba7
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