1. 15 Dec, 2016 1 commit
  2. 27 Jul, 2016 1 commit
    • Soby Mathew's avatar
      GICv3: Fix the GICD_IROUTER offset · 61e30277
      Soby Mathew authored
      This patch fixes the offset of GICD_IROUTER register defined in gicv3.h.
      Although the GICv3 documention mentions that the offset for this register
      is 0x6100-0x7FD8, the offset calculation for an interrupt id `n` is :
      
         0x6000 + 8n, where n >= 32
      
      This requires the offset for GICD_IROUTER to be defined as 0x6000.
      
      Fixes ARM-software/tf-issues#410
      
      Change-Id: If9e91e30d946afe7f1f60fea4f065c7567093fa8
      61e30277
  3. 18 Jul, 2016 1 commit
    • Soby Mathew's avatar
      Rework type usage in Trusted Firmware · 4c0d0390
      Soby Mathew authored
      This patch reworks type usage in generic code, drivers and ARM platform files
      to make it more portable. The major changes done with respect to
      type usage are as listed below:
      
      * Use uintptr_t for storing address instead of uint64_t or unsigned long.
      * Review usage of unsigned long as it can no longer be assumed to be 64 bit.
      * Use u_register_t for register values whose width varies depending on
        whether AArch64 or AArch32.
      * Use generic C types where-ever possible.
      
      In addition to the above changes, this patch also modifies format specifiers
      in print invocations so that they are AArch64/AArch32 agnostic. Only files
      related to upcoming feature development have been reworked.
      
      Change-Id: I9f8c78347c5a52ba7027ff389791f1dad63ee5f8
      4c0d0390
  4. 04 Dec, 2015 1 commit
    • Soby Mathew's avatar
      Rename GICv3 interrupt group macros · 03ffb6bd
      Soby Mathew authored
      This patch renames the GICv3 interrupt group macros from
      INT_TYPE_G0, INT_TYPE_G1S and INT_TYPE_G1NS to INTR_GROUP0,
      INTR_GROUP1S and INTR_GROUP1NS respectively.
      
      Change-Id: I40c66f589ce6234fa42205adcd91f7d6ad8f33d4
      03ffb6bd
  5. 26 Nov, 2015 1 commit
    • Achin Gupta's avatar
      Add ARM GICv3 driver without support for legacy operation · df373737
      Achin Gupta authored
      This patch adds a driver for ARM GICv3 systems that need to run software
      stacks where affinity routing is enabled across all privileged exception
      levels for both security states. This driver is a partial implementation
      of the ARM Generic Interrupt Controller Architecture Specification, GIC
      architecture version 3.0 and version 4.0 (ARM IHI 0069A). The driver does
      not cater for legacy support of interrupts and asymmetric configurations.
      
      The existing GIC driver has been preserved unchanged. The common code for
      GICv2 and GICv3 systems has been refactored into a new file,
      `drivers/arm/gic/common/gic_common.c`. The corresponding header is in
      `include/drivers/arm/gic_common.h`.
      
      The driver interface is implemented in `drivers/arm/gic/v3/gicv3_main.c`.
      The corresponding header is in `include/drivers/arm/gicv3.h`. Helper
      functions are implemented in `drivers/arm/gic/v3/arm_gicv3_helpers.c`
      and are accessible through the `drivers/arm/gic/v3/gicv3_private.h`
      header.
      
      Change-Id: I8c3c834a1d049d05b776b4dcb76b18ccb927444a
      df373737