- 28 Apr, 2021 12 commits
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Mark Dykes authored
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Mark Dykes authored
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Mark Dykes authored
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Mark Dykes authored
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Madhukar Pappireddy authored
* changes: docs: update release information for v2.6 docs: update code freeze & target date for v2.5
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Madhukar Pappireddy authored
Updated tentative code freeze and release target date for v2.6 release. Change-Id: I3dd6cfef1a07f3e0159ec7996d18f6cbcb975da7 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Madhukar Pappireddy authored
Updated code freeze and release target date for v2.5 release. Change-Id: I72850eed2aa77d3adecaf71d74e9ecebcc36d5b4 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Olivier Deprez authored
* changes: fix(dt-bindings): fix static checks docs(license): rectify `arm-gic.h` license
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David Horstmann authored
NOTE: Breaking change to the way UUIDs are stored in the DT Currently, UUIDs are stored in the device tree as sequences of 4 integers. There is a mismatch in endianness between the way UUIDs are represented in memory and the way they are parsed from the device tree. As a result, we must either store the UUIDs in little-endian format in the DT (which means that they do not match up with their string representations) or perform endianness conversion after parsing them. Currently, TF-A chooses the second option, with unwieldy endianness-conversion taking place after reading a UUID. To fix this problem, and to make it convenient to copy and paste UUIDs from other tools, change to store UUIDs in string format, using a new wrapper function to parse them from the device tree. Change-Id: I38bd63c907be14e412f03ef0aab9dcabfba0eaa0 Signed-off-by: David Horstmann <david.horstmann@arm.com>
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David Horstmann authored
TF-A does not have the capability to read UUIDs in string form from the device tree. This capability is useful for readability, so add a wrapper function, fdtw_read_uuid() to parse UUIDs from the DT. This function should parse a string of the form: "aabbccdd-eeff-4099-8877-665544332211" to the byte sequence in memory: [aa bb cc dd ee ff 40 99 88 77 66 55 44 33 22 11] Change-Id: I99a92fbeb40f4f4713f3458b36cb3863354d2bdf Signed-off-by: David Horstmann <david.horstmann@arm.com>
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Manish V Badarkhe authored
Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IMAGE_MAX_SIZE so that these macros can be reused in the subsequent GPT based support changes. Change-Id: I88fdbd53e1966578af4f1e8e9d5fef42c27b1173 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Manish Pandey authored
* changes: fdts: stm32mp1: add support for the Seeed Odyssey SoM and board fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl fdts: stm32mp1: add I2C2 pins in the pinctrl fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS
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- 27 Apr, 2021 8 commits
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Manish Pandey authored
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Pali Rohár authored
This new compile option is only for Armada 3720 Development Board. When it is set to 1 then TF-A will setup PM wake up src configuration. By default this new option is disabled as it is board specific and no other A37xx board has PM wake up src configuration. Currently neither upstream U-Boot nor upstream Linux kernel has wakeup support for A37xx platforms, so having it disabled does not cause any issue. Prior this commit PM wake up src configuration specific for Armada 3720 Development Board was enabled for every A37xx board. After this change it is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1 Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I09fea1172c532df639acb3bb009cfde32d3c5766
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Manish V Badarkhe authored
Platform NV counter get updated (if cert NV counter > plat NV counter) before authenticating the certificate if the platform specifies NV counter method before signature authentication in its CoT, and this provides an opportunity for a tempered certificate to upgrade the platform NV counter. This is theoretical issue, as in practice none of the standard CoT (TBBR, dualroot) or upstream platforms ones (NXP) exercised this issue. To fix this issue, modified the auth_nvctr method to do only NV counter check, and flags if the NV counter upgrade is needed or not. Then ensured that the platform NV counter gets upgraded with the NV counter value from the certificate only after that certificate gets authenticated. This change is verified manually by modifying the CoT that specifies certificate with: 1. NV counter authentication before signature authentication method 2. NV counter authentication method only Change-Id: I1ad17f1a911fb1035a1a60976cc26b2965b05166 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Manish Pandey authored
* changes: feat(board/rdn2): add support for variant 1 of rd-n2 platform feat(plat/sgi): introduce platform variant build option
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Alexei Fedorov authored
This patch fixes static checks errors reported for missing copyright in `include/dt-bindings/interrupt-controller/arm-gic.h` and the include order of header files in `.dts` and `.dtsi` files. Change-Id: I2baaf2719fd2c84cbcc08a8f0c4440a17a9f24f6 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Chris Kay <chris.kay@arm.com>
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Aditya Angadi authored
Add board support for RD-N2 Cfg1 variant of RD-N2 platform. It is a variant of RD-N2 platform with a reduced interconnect mesh size (3x3) and core count (8-cores). Its platform variant id is 1. Change-Id: I34ad35c5a5c1e9b69a658fb92ed00e5bc5fe72f3 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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Aditya Angadi authored
A Neoverse reference design platform can have two or more variants that differ in core count, cluster count or other peripherals. To allow reuse of platform code across all the variants of a platform, introduce build option CSS_SGI_PLATFORM_VARIANT for Arm Neoverse reference design platforms. The range of allowed values for the build option is platform specific. The recommended range is an interval of non negative integers. An example usage of the build option is make PLAT=rdn2 CSS_SGI_PLATFORM_VARIANT=1 Change-Id: Iaae79c0b4d0dc700521bf6e9b4979339eafe0359 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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Manish Pandey authored
* changes: plat/qemu: add "max" cpu support Add support for QEMU "max" CPU
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- 26 Apr, 2021 6 commits
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Manish Pandey authored
* changes: build: deprecate Arm sgm775 FVP platform docs: introduce process for platform deprecation
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Manish Pandey authored
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Manish Pandey authored
* changes: mediatek: mt8195: add rtc power off sequence mediatek: mt8195: add power-off support mediatek: mt8195: Add reboot function for PSCI mediatek: mt8195: Add gpio driver mediatek: mt8195: Add SiP service mediatek: mt8195: Add CPU hotplug and MCDI support mediatek: mt8195: Add MCDI drivers mediatek: mt8195: Add SPMC driver mediatek: mt8195: Initialize delay_timer mediatek: mt8195: initialize systimer mediatek: mt8192: move timer driver to common folder mediatek: mt8195: add sys_cirq support mediatek: mt8195: initialize GIC Initialize platform for MediaTek MT8195
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Manish Pandey authored
This will help in keeping source file generic and conditional compilation can be contained in platform provided dt files. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I3c6e0a429073f0afb412b9ba521ce43f880b57fe
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Chris Kay authored
The `arm-gic.h` file distributed by the Linux kernel is disjunctively dual-licensed under the GPL-2.0 or MIT licenses, but the BSD-3-Clause license has been applied in violation of the requirements of both licenses. This change ensures the file is correctly licensed under the terms of the MIT license, and that we comply with it by distributing a copy of the license text. Change-Id: Ie90066753a5eb8c0e2fc95ba43e3f5bcbe2fa459 Signed-off-by: Chris Kay <chris.kay@arm.com>
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Olivier Deprez authored
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- 23 Apr, 2021 14 commits
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Manish Pandey authored
sgm775 is an old platform and is no longer maintained by Arm and its fast model FVP_CSS_SGM-775 is no longer available for download. This platform is now superseded by Total Compute(tc) platforms. This platform is now deprecated but the source will be kept for cooling off period of 2 release cycle before removing it completely. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I8fe1fc3da0c508dba62ed4fc60cbc1642e0f7f2a
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Manish Pandey authored
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ifb8a3220f2fc2286fa91614887d17f54178ed002
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Yidi Lin authored
mt8195 also uses mt6359p RTC. Revice mt8192 RTC and share the driver with mt8195. Change-Id: I20c73f6e0af67ef9d4c3d4e0ff373f93950e07db Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
mt8195 also uses PMIC mt6359p. The only difference is the pwrap register definition. Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Add system_reset function in PSCI ops Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I177796e30198b0a53402093ee0917dda43074385
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mtk20895 authored
Add gpio driver. Signed-off-by: mtk20895 <zhiqiang.ma@mediatek.com> Change-Id: I6ff6875c35294f56f2d8298d75cd18c230aad211
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Yidi Lin authored
Add the basic SiP service Change-Id: I21fe9d85eac4be9101b12c4b6c28294c5b93cb5f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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James Liao authored
Implement PSCI platform OPs to support CPU hotplug and MCDI. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I1321f7989c8a3d116d698768a7146e8f180ee9c0
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James Liao authored
Add MCDI related drivers to handle CPU powered on/off in CPU suspend. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: I6a6f9bf5d1d8bda1ee603d8bf3fc206437de7ad8
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James Liao authored
Add SPMC driver for CPU power on/off. Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Change-Id: If47d7f3f3b9965f3c0402ea6cdb917ad1d16bb32
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Yidi Lin authored
Initialize delay_timer for delay functions. Change-Id: Ib554135151f8b5c642b5a6511c942bb9efc0a47f Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
Change-Id: I7e0fbd04b0cdf5da92b8ef39737342f2d66f5f10 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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Yidi Lin authored
The timer driver can be shared with mt8195. Move the the timer driver to common/. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I84c97ab9cc9b469f35e0f44dd8e7b2b95f1b3926
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gtk_pangao authored
MT8192 cirq driver can be shared with MT8195. Move cirq driver to common common folder. Signed-off-by: gtk_pangao <gtk_pangao@mediatek.com> Change-Id: Iba5cdcfd2116f0bd07e0497250f2da45613e3a4f
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