- 05 May, 2016 1 commit
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Sandrine Bailleux authored
This patch adds some debug assertions ensuring that array indices are within the bounds of the array. Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a
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- 04 May, 2016 5 commits
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danh-arm authored
rockchip: support the suspend/resume for rk3399
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danh-arm authored
Refactor MediaTek platform common code
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Caesar Wang authored
This patch adds to support the suspend/resume for rk3399 SoCs. Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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danh-arm authored
FVP: Remove VE memory map support and change default GIC driver
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Leon Chen authored
Refactor MediaTek platform common code for further mt6795 upstream.
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- 28 Apr, 2016 1 commit
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Soby Mathew authored
This patch changes the default driver for FVP platform from the deprecated GICv3 legacy to the GICv3 only driver. This means that the default build of Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The user guide is also updated to reflect this change of default GIC driver for FVP. Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764
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- 27 Apr, 2016 10 commits
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Soby Mathew authored
This patch removes support for legacy Versatile Express memory map for the GIC peripheral in the FVP platform. The user guide is also updated for the same. Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533
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danh-arm authored
Emmc v3
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Haojian Zhuang authored
In a lot of embedded platforms, eMMC device is the only one storage device. So loading content from eMMC device is required in ATF. Create the emmc stack that could co-work with IO block driver. Support to read/write/erase eMMC blocks on both rpmb and normal user area. Support to change the IO speed and bus width. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
Add MAX_IO_BLOCK_DEVICES in porting guide. It's necessary to define this macro to support io block device. With this macro, multiple block devices could be opened at the same time. Each block device stores its own state. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Haojian Zhuang authored
FIP is accessed as memory-mapped type. eMMC is block device type. In order to support FIP based on eMMC, add the new io_block layer. io_block always access eMMC device as block size. And it'll only copy the required data into buffer in io_block driver. So preparing an temporary buffer is required. When use io_block device, MAX_IO_BLOCK_DEVICES should be declared in platform_def.h. It's used to support multiple block devices. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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danh-arm authored
Doc: Fix the path to the xlat lib
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danh-arm authored
fip_create: Fix exit status for missing output filename (2)
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danh-arm authored
Fix computation of L1 bitmask in the translation table lib
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Sandrine Bailleux authored
The translation table library code has moved from lib/aarch64/ to lib/xlat_tables/ since commit 3ca9928d but the Porting Guide still points to the old location. This patch fixes this issue. Change-Id: I983a9a100d70eacf6bac71725ffbb4bb5f3732b0
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Brendan Jackman authored
Change-Id: I0d298eea9eaf47121c87637c7395e5d9868aa272
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- 26 Apr, 2016 3 commits
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Sandrine Bailleux authored
This patch fixes the computation of the bitmask used to isolate the level 1 field of a virtual address. The whole computation needs to work on 64-bit values to produce the correct bitmask value. XLAT_TABLE_ENTRIES_MASK being a C constant, it is a 32-bit value so it needs to be extended to a 64-bit value before it takes part in any other computation. This patch fixes this bug by casting XLAT_TABLE_ENTRIES_MASK as an unsigned long long. Note that this bug doesn't manifest itself in practice because address spaces larger than 39 bits are not yet supported in the Trusted Firmware. Change-Id: I955fd263ecb691ca94b29b9c9f576008ce1d87ee
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danh-arm authored
Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms
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Yatharth Kochar authored
This patch puts the definition of `plat_get_syscnt_freq()` under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file. This is the fix for compilation error introduced by commit-id `749ade45`, for platforms that use arm_common.c but do not provide a memory mapped interface to the generic counter. Fixes ARM-software/tf-issues#395 Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745
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- 25 Apr, 2016 6 commits
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danh-arm authored
Validate psci_cpu_on_start() arguments
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danh-arm authored
rockchip: fixes for the required
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danh-arm authored
Move `plat_get_syscnt_freq()` to arm_common.c
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Sandrine Bailleux authored
The "end power level" value passed as the 3rd argument to the psci_cpu_on_start() function is not used so this patch removes it. Change-Id: Icaa68b8c4ecd94507287970455fbff354faaa41e
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Sandrine Bailleux authored
This patch introduces some debug assertions in the function psci_cpu_on_start() to check the arguments it receives are valid. Change-Id: If4d23c9f668fb46f2d18c5e2ed1929498cc6736b
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Caesar Wang authored
This patch has the following change for rk3399. * Set the uart to 115200 since the loader decide to set uart baud to 115200Hz. So the ATF also should set uart baud to 115200. * We need ensure the bl31 base is greater than 4KB since there are have the shared mem for coreboot.(Note: the previous vesion was tested with uboot) Otherwise, we will happen the exception crash since the ddr area won't to work from the shared ram address in some cases. For example, the exception crash: CBFS: Found @ offset 19c80 size 24074 exception _sync_sp_el0 ELR = 0x0000000000008000 ESR = 0x0000000002000000 SPSR = 0x600003cc FAR = 0xffffffff00000000 SP = 0x00000000ff8ed230 ... X29 = 0x00000000ff8c1fc0 X30 = 0x000000000030e3b0 exception death Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7 Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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- 22 Apr, 2016 2 commits
- 21 Apr, 2016 9 commits
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Yatharth Kochar authored
This patch moves the definition for `plat_get_syscnt_freq()` from arm_bl31_setup.c to arm_common.c. This could be useful in case a delay timer needs to be installed based on the generic timer in other BLs. This patch also modifies the return type for this function from `uint64_t` to `unsigned long long` within ARM and other platform files. Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d
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Sandrine Bailleux authored
This patch adds links to the Cortex-A53 and Cortex-A57 MPCores Software Developers Errata Notice documents in the ARM CPU Specific Build Macros document. Change-Id: I0aa26d7f373026097ed012a02bc61ee2c5b9d6fc
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Sandrine Bailleux authored
Change-Id: I86ac81ffd7cd094ce68c4cceb01c16563671a063
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Sandrine Bailleux authored
Change-Id: Icaacd19c4cef9c10d02adcc2f84a4d7c97d4bcfa
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Sandrine Bailleux authored
Change-Id: Ia2ce8aa752efb090cfc734c1895c8f2539e82439
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Sandrine Bailleux authored
Change-Id: I632a8c5bb517ff89c69268e865be33101059be7d
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danh-arm authored
Update User Guide and move up to Linaro 16.02
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Sandrine Bailleux authored
Change-Id: I45641551474f4c58c638aff8c42c0ab9a8ec78b4
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Sandrine Bailleux authored
The CPU errata build flags don't enable errata, they enable errata workarounds. Change-Id: Ica65689d1205fc54eee9081a73442144b973400f
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- 18 Apr, 2016 1 commit
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danh-arm authored
Add support for unoptimised (-O0) build
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- 15 Apr, 2016 1 commit
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Antonio Nino Diaz authored
The only case in which regions can now overlap is if they are identity mapped or they have the same virtual to physical address offset (identity mapping is just a particular case of the latter). They must overlap completely (i.e. one of them must be completely inside the other one) and not cover the same area. This allow future enhancements to the xlat_tables library without having to support unnecessarily complex edge cases. Outer regions are now sorted by mmap_add_region() before inner regions with the same base virtual address for consistency: all regions contained inside another one must be placed after the outer one in the list. If an inner region has the same attributes as the outer ones it will be merged when creating the tables with init_xlation_table(). This cannot be done as regions are added because there may be cases where adding a region makes previously mergeable regions no longer mergeable. If the attributes of an inner region are different than the outer region, new pages will be generated regardless of how "restrictive" they are. For example, RO memory is more restrictive than RW. The old implementation would give priority to RO if there is an overlap, the new one doesn't. NOTE: THIS IS THEORETICALLY A COMPATABILITY BREAK FOR PLATFORMS THAT USE THE XLAT_TABLES LIBRARY IN AN UNEXPECTED WAY. PLEASE RAISE A TF-ISSUE IF YOUR PLATFORM IS AFFECTED. Change-Id: I75fba5cf6db627c2ead70da3feb3cc648c4fe2af
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- 14 Apr, 2016 1 commit
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danh-arm authored
Allow to dump platform-defined regs in crash log
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