1. 28 Aug, 2020 1 commit
  2. 12 Jun, 2020 1 commit
    • Varun Wadekar's avatar
      Tegra194: SiP: clear RAS corrected error records · 0d851195
      Varun Wadekar authored
      
      
      This patch introduces a function ID to clear all the RAS error
      records for corrected errors.
      
      Per latest requirement, ARM RAS corrected errors will be reported to
      lower ELs via interrupts and cleared via SMC. This patch provides
      required function to clear RAS error status.
      
      This patch also sets up all required RAS Corrected errors in order to
      route RAS corrected errors to lower ELs.
      
      Change-Id: I554ba1d0797b736835aa27824782703682c91e51
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      Signed-off-by: default avatarDavid Pu <dpu@nvidia.com>
      0d851195
  3. 23 Mar, 2020 1 commit
  4. 22 Mar, 2020 1 commit
  5. 19 Mar, 2020 1 commit
  6. 11 Mar, 2020 2 commits
    • Varun Wadekar's avatar
      Tegra: bpmp: fixup TEGRA_CLK_SE values for Tegra186/Tegra194 · e9044480
      Varun Wadekar authored
      
      
      This patch fixes the SE clock ID being used for Tegra186 and Tegra194
      SoCs. Previous assumption, that both SoCs use the same clock ID, was
      incorrect.
      
      Change-Id: I1ef0da5547ff2e14151b53968cad9cc78fee63bd
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      e9044480
    • Jeetesh Burman's avatar
      Tegra194: add SE support to generate SHA256 of TZRAM · 029dd14e
      Jeetesh Burman authored
      
      
      The BL3-1 firmware code is stored in TZSRAM on Tegra194 platforms. This
      memory loses power when we enter System Suspend and so its contents are
      stored to TZDRAM, before entry. This opens up an attack vector where the
      TZDRAM contents might be tampered with when we are in the System Suspend
      mode. To mitigate this attack the SE engine calculates the hash of entire
      TZSRAM and stores it in PMC scratch, before we copy data to TZDRAM. The
      WB0 code will validate the TZDRAM and match the hash with the one in PMC
      scratch.
      
      This patch adds driver for the SE engine, with APIs to calculate the hash
      and store to PMC scratch registers.
      
      Change-Id: I04cc0eb7f54c69d64b6c34fc2ff62e4cfbdd43b2
      Signed-off-by: default avatarJeetesh Burman <jburman@nvidia.com>
      029dd14e
  7. 05 Feb, 2020 1 commit
  8. 31 Jan, 2020 2 commits
    • Varun Wadekar's avatar
      Tegra194: mce: fix multiple MISRA issues · 4a232d5b
      Varun Wadekar authored
      
      
      This patch fixes violations of the following MISRA rules
      
      * Rule 8.5  "An external object or function shall be declared once in
                   one and only one file"
      * Rule 10.3 "The value of an expression shall not be assigned to an
                   object with a narrower essential type or of a different
                   esential type category"
      
      Change-Id: I4314cd4fea0a4adc6665868dd31e619b4f367e14
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      4a232d5b
    • Varun Wadekar's avatar
      Tegra194: se: fix multiple MISRA issues · 8d4107f0
      Varun Wadekar authored
      
      
      This patch fixes violations for the following MISRA rules
      
      * Rule 8.4  "A compatible declaration shall be visible when an object or
                   function with external linkage is defined"
      * Rule 10.1 "Operands shall not be of an inappropriate essential type"
      * Rule 10.6 "Both operands of an operator in which the usual arithmetic
                   conversions are perdormed shall have the same essential type
                   category"
      * Rule 17.7 "The value returned by a function having non-void return
                   type shall be used"
      
      Change-Id: I171ac8340de729fd7be928fa0c0694e9bb8569f0
      Signed-off-by: default avatarVarun Wadekar <vwadekar@nvidia.com>
      8d4107f0
  9. 28 Jan, 2020 1 commit
    • Madhukar Pappireddy's avatar
      Enable -Wredundant-decls warning check · ca661a00
      Madhukar Pappireddy authored
      
      
      This flag warns if anything is declared more than once in the same
      scope, even in cases where multiple declaration is valid and changes
      nothing.
      
      Consequently, this patch also fixes the issues reported by this
      flag. Consider the following two lines of code from two different source
      files(bl_common.h and bl31_plat_setup.c):
      
      IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
      IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE);
      
      The IMPORT_SYM macro which actually imports a linker symbol as a C expression.
      The macro defines the __RO_START__ as an extern variable twice, one for each
      instance. __RO_START__ symbol is defined by the linker script to mark the start
      of the Read-Only area of the memory map.
      
      Essentially, the platform code redefines the linker symbol with a different
      (relevant) name rather than using the standard symbol. A simple solution to
      fix this issue in the platform code for redundant declarations warning is
      to remove the second IMPORT_SYM and replace it with following assignment
      
      static const unsigned long BL2_RO_BASE = BL_CODE_BASE;
      
      Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa
      Signed-off-by: default avatarMadhukar Pappireddy <madhukar.pappireddy@arm.com>
      ca661a00
  10. 23 Jan, 2020 3 commits
  11. 17 Jan, 2020 2 commits
  12. 12 Jan, 2020 1 commit
  13. 09 Jan, 2020 2 commits
  14. 08 Jan, 2020 1 commit
  15. 28 Nov, 2019 13 commits
  16. 13 Nov, 2019 1 commit
  17. 24 Oct, 2019 6 commits