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    • Marek Vasut's avatar
      rcar_gen3: plat: Prevent PCIe hang during L1X config access · 0969397f
      Marek Vasut authored
      
      
      In case the PCIe controller receives a L1_Enter_PM DLLP, it will
      disable the internal PLLs. The system software cannot predict it
      and can attempt to perform device config space access across the
      PCIe link while the controller is in this transitional state. If
      such condition happens, the PCIe controller register access will
      trigger ARM64 SError exception.
      
      This patch adds checks for which PCIe controller is enabled,
      checks whether the PCIe controller is in such a transitional
      state and if so, first completes the transition and then restarts
      the instruction which caused the SError.
      Signed-off-by: default avatarMarek Vasut <marek.vasut+renesas@gmail.com>
      0969397f