- 27 Jul, 2021 1 commit
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Pali Rohár authored
Update documentation and group platform specific build options into their own subsections. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I05927d8abf9f811493c49b856f06329220e7d8bb
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- 20 Jul, 2021 1 commit
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Manish Pandey authored
* changes: fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables refactor(plat/marvell/a3k): Rename DOIMAGETOOL to TBB refactor(plat/marvell/a3k): Remove useless DOIMAGEPATH variable fix(plat/marvell/a3k): Fix check for external dependences fix(plat/marvell/a8k): Add missing build dependency for BLE target fix(plat/marvell/a8k): Correctly set include directories for individual targets fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set
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- 19 Jul, 2021 7 commits
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bipin.ravi authored
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johpow01 authored
Neoverse V1 erratum 1940577 is a Cat B erratum, present in some revisions of the V1 processor core. The workaround is to insert a DMB ST before acquire atomic instructions without release semantics. This issue is present in revisions r0p0 - r1p1 but this workaround only applies to revisions r1p0 - r1p1, there is no workaround for older versions. SDEN can be found here: https://documentation-service.arm.com/static/60d499080320e92fa40b4625 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I210ad7d8f31c81b6ac51b028dfbce75a725c11aa
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Madhukar Pappireddy authored
* changes: refactor(plat/nxp/lx216x): refine variable definition refactor(plat/nxp/lx216x): use common make variables
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Madhukar Pappireddy authored
* changes: docs: add mt6795 to deprecated list feat(plat/mediatek/mt8195): add DCM driver
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bipin.ravi authored
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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- 17 Jul, 2021 1 commit
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Rex-BC Chen authored
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I2b3aa9bd0c23c360ecee673c68e1b2c92bc6d2be
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- 16 Jul, 2021 3 commits
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johpow01 authored
Neoverse V1 erratum 1791573 is a Cat B erratum present in r0p0 and r1p0 of the V1 processor core. It is fixed in r1p1. SDEN can be found here: https://documentation-service.arm.com/static/60d499080320e92fa40b4625 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ic6f92da4d0b995bd04ca5b1673ffeedaebb71d10
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Pali Rohár authored
INFO() macro for every call prepends "INFO: " string. Therefore current code prints unreadable debug messages: "INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO: " "INFO: Set IO decode window successfully, base(0xc000)INFO: win_attr(3d) max_dram_win(2) max_remap(0)INFO: win_offset(8)" Fix it by calling exactly one INFO() call for one line. After this change output is: "INFO: set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)" "INFO: Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)" Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745
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Madhukar Pappireddy authored
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- 13 Jul, 2021 2 commits
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Madhukar Pappireddy authored
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Joanna Farley authored
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- 12 Jul, 2021 3 commits
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Manish V Badarkhe authored
Change-Id: I65da6ead356e3f4ee47c5a6bf391f65309bafcdd Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Julius Werner authored
The two existing plat/rockchip code owners seem to be no longer active in the project and are not responding to reviews. There have been a couple of small fixup patches[1][2][3] pending for months that couldn't be checked in for lack of Code-Owner-Review+1 flag. Add myself to the code owner list to unblock this bottleneck (I have been deeply involved in the rk3399 port, at least, so I know most of the code reasonably well). [1] https://review.trustedfirmware.org/9616 [2] https://review.trustedfirmware.org/9990 [2] https://review.trustedfirmware.org/10415 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ic7b2bb73c35a9bea91ff46ee445a22819d2045d9
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Manish Pandey authored
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- 11 Jul, 2021 2 commits
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Pali Rohár authored
For UART secure boot it is required also TIMN image, so pack it into uart-images.tgz.bin archive which is created by mrvl_uart target. $(TIMN_IMAGE) and $(TIM_IMAGE) variables are used only for UART images so their content needs to be initialized from $(TIMN_UART_CFG) and $(TIM_UART_CFG) config files. And not from $(TIMN_CFG) and $(TIM_CFG) as it is now because they are not generated during mrvl_uart target. Fix it to allow building mrvl_uart target before mrvl_flash target. To match usage of these variables, rename them to $(TIMN_UART_IMAGE) and $(TIM_UART_IMAGE). To not complicate rule for building uart-images.tgz.bin archive, set list of image files into a new $(UART_IMAGES) variable. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I83b980abb4047a3afb3ce3026842e1d873c490bf
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Pali Rohár authored
For TIM config file use TIM name instead of DOIMAGE and use underscores to make variable names more readable. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I1282ce11f1431c15458a143ae7bfcee85eed2432
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- 10 Jul, 2021 6 commits
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Pali Rohár authored
Armada 3700 uses external TBB tool for creating images and does not use internal TF-A doimage tool from tools/marvell/doimage/ Therefore set correct name of variable. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I38a94dca78d483de4c79da597c032e1e5d06d92d
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Pali Rohár authored
Armada 3700 uses WTP so use WTP variable directly. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I216b40ffee1f3f8abba4677f050ab376c2224ede
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Pali Rohár authored
Old Marvell a3700_utils and mv-ddr tarballs do not have to work with latest TF-A code base. Marvell do not provide these old tarballs on Extranet anymore. Public version on github repository contains all patches and is working fine, so for public TF-A builds use only public external dependencies from git. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Iee5ac6daa9a1826a5b80a8d54968bdbb8fe72f61
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Pali Rohár authored
BLE source files depend on external Marvell mv-ddr-marvell tree (specified in $(MV_DDR_PATH) variable) and its header files. Add dependency on $(MV_DDR_LIB) target which checks that variable $(MV_DDR_PATH) is correctly set and ensures that make completes compilation of mv-ddr-marvell tree. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I73968b24c45d9af1e3500b8db7a24bb4eb2bfa47
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Pali Rohár authored
Do not set all include directories, including those for external targets in one PLAT_INCLUDES variable. Instead split them into variables: * $(PLAT_INCLUDES) for all TF-A BL images * BLE target specific $(PLAT_INCLUDES) only for Marvell BLE image * $(MV_DDR_INCLUDES) for targets in external Marvell mv-ddr-marvell tree Include directory $(CURDIR)/drivers/marvell is required by TF-A BL images, so move it from ble.mk to a8k_common.mk. Include directory $(MV_DDR_PATH) is needed only by Marvell BLE image, so move it into BLE target specific $(PLAT_INCLUDES) variable. And remaining include directories specified in ble.mk are needed only for building external dependences from Marvell mv-ddr tree, so move them into $(MV_DDR_INCLUDES) variable and correctly use it in $(MV_DDR_LIB) target. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I331f7de675dca2bc70733d56b768f00d56ae4a67
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Pali Rohár authored
Target mrvl_flash depends on external mv_ddr source code which is not part of TF-A project. Do not expect that it is pre-downloaded at some specific location and require user to specify correct path to mv_ddr source code via MV_DDR_PATH build option. TF-A code for Armada 37x0 platform also depends on mv_ddr source code and already requires passing correct MV_DDR_PATH build option. So for A8K implement same checks for validity of MV_DDR_PATH option as are already used by TF-A code for Armada 37x0 platform. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I792f2bfeab0cec89b1b64e88d7b2c456e22de43a
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- 09 Jul, 2021 2 commits
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Manish V Badarkhe authored
Change-Id: Ia660b6554fe4544effd1810e1aca202f95e3c447 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Madhukar Pappireddy authored
* changes: fix(plat/xilinx/versal): use sync method for blocking calls fix(plat/xilinx/zynqmp): use sync method for blocking calls
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- 08 Jul, 2021 2 commits
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Abhyuday Godhasara authored
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are not reading status from IPI payload data. Use sync method which reads actual return status from IPI payload. Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: I6f568b85d0da639c264f507122e3015807d8423d
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Abhyuday Godhasara authored
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are not reading status from IPI payload data. Use sync method which reads actual return status from IPI payload. Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: I78f9c061a80cee6d524ade4ef124ca88ce1848cf
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- 07 Jul, 2021 3 commits
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Madhukar Pappireddy authored
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Sandrine Bailleux authored
* changes: refactor(measured boot): revisit error handling (3/3) refactor(measured boot): revisit error handling (2/3) refactor(measured boot): revisit error handling (1/3)
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Madhukar Pappireddy authored
* changes: refactor(plat/st): add stm32image_io_setup fix(plat/st): panic if boot interface is wrong
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- 06 Jul, 2021 1 commit
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Garmin Chang authored
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle. 1. Add MCUSYS related DCM drivers. 2. Enable MCUSYS related DCM by default. Change-Id: I3237199bc217bd3682f51d31284db5fd0324b396 Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
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- 05 Jul, 2021 6 commits
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Manish Pandey authored
* changes: fix(tools/stm32image): improve the tool fix(plat/st): add STM32IMAGE_SRC
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Sandrine Bailleux authored
- In tpm_record_measurement(): The platform layer is responsible for providing an exhaustive list of images to measure. If it doesn't then this should be treated as a programming error, as documented in [1]. Thus, turn the error test into an assertion. [1] https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guidelines.html#using-assert-to-check-for-programming-errors Change-Id: I002309c2ebdf2d348a7d12a8f7f9e82465046b8e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
- In add_event2(): Turn the first error condition checking whether there is room for an extra event2 data structure into an assertion. The platform layer is responsible for choosing an appropriate event log buffer size based on the number of measurements it expects. If this assertion fires, the platform macro EVENT_LOG_SIZE should be adjusted and the firmware recompiled. Call this assumption out in the function documentation. Also remove the second error condition check, which is a subset of the first one and thus is redundant. As a result of these changes, add_event2() can no longer fail. Thus, change its return type from int to void. Also, the 'size_of_event' local variable is now unused in release builds so remove it and move its value into the assertion. Change-Id: I113fc141de59708b20435a0c7126255561ab7786 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Sandrine Bailleux authored
- In event_log_init(): Throughout the function, we are incrementing a pointer by some fixed amounts of bytes (corresponding to the size of some data structure or to some constant number of bytes), there is no variable-size increments in the picture. Thus it seems pointless to verify that the pointer has indeed been incremented by this fixed amount of bytes afterwards. For this reason, remove these checks altogether. As a result, the start_ptr local variable is now unused so remove it as well. Change-Id: I612e2278cd3a63d1417427e45d81e285503f5efe Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Ruchika Gupta authored
In the qemu memory map 1GB and up is RAM. Change the size of NS DRAM to 3GB to support VM's with more memory requirements. Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Change-Id: If15cf3b9d3e2e7876c40ce888f22e887893fe696
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Sandrine Bailleux authored
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