- 27 May, 2021 3 commits
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Yann Gautier authored
Three functions are exported to get SoC version, SoC device ID, and SoC name. Those functions are based on reworked existing static functions. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I1f3949062bb488286a9e7a38ffcd1457953dac56
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Yann Gautier authored
The definitions of SMCCC_ARCH_SOC_ID SoC version return bits are defined in SMC Calling Convention [1]. Add the masks and shifts for JEP-106 bank index, JEP-106 identification code, and Implementation defined SoC ID. Add a macro to easily set JEP-106 fields. [1] https://developer.arm.com/documentation/den0028/latest/ Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Iecbd09f6de6728de89dc746d2d1981a5a97a8ab7
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Manish Pandey authored
* changes: TF-A: Document SMC_PCI_SUPPORT option SMCCC/PCI: Handle std svc boilerplate SMCCC/PCI: Add initial PCI conduit definitions SMCCC: Hoist SMC_32 sanitization
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- 26 May, 2021 7 commits
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Madhukar Pappireddy authored
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Mark Dykes authored
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Madhukar Pappireddy authored
* changes: feat(plat/mediatek/apu): add mt8192 APU device apc driver feat(plat/mediatek/apu): add mt8192 APU SiP call support feat(plat/mediatek/apu): add mt8192 APU iommap regions feat(plat/mediatek/apu): setup mt8192 APU_S_S_4 and APU_S_S_5 permission
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Madhukar Pappireddy authored
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Madhukar Pappireddy authored
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Flora Fu authored
Add APU device apc driver and setup permission. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: I2bbdb69d11267e4252b2138b5c5ac8faf752740f
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Flora Fu authored
Add APU SiP call support for start/stop mcu. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: Ibf93d8ccf22c414de3093cee9e13f7668588f69e Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@mediatek.com>
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- 25 May, 2021 8 commits
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Madhukar Pappireddy authored
Two issues in documentation were identified after the release. This patch fixes these typos. 1. Matternhorn ELP CPU was made available through v2.5 release, not Matternhorn CPU 2. We had upgraded TF-A to use GCC 10.2 toolchain family and used this toolchain for release testing Change-Id: I33e59bb5a6d13f4d40dbb3352004d5b133431d65 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Rajan Vaja authored
Use proper offset for IPI data based on offset for IPI0 channel. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: I3070517944dd353c3733aa595df0da030127751a
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Jeremy Linton authored
Add some basic documentation and pointers for the SMCCC PCI build options. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Change-Id: Ia35f31d15066ea74135367cde2dce2f26e6ab31e
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Jeremy Linton authored
Add SMC wrappers for handshaking the existence and basic parameter validation for the SMCCC/PCI API. The actual read/write/segment validation is implemented by a given platform which will enable the API by defining SMC_PCI_SUPPORT. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Change-Id: I4485ad0fe6003cec6f5eedef688914d100513c21
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Jeremy Linton authored
Add constants, structures and build definition for the new standard SMCCC PCI conduit. These are documented in DEN0115A. https://developer.arm.com/documentation/den0115/latest Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Change-Id: If667800a26b9ae88626e8d895674c9c2e8c09658
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Jeremy Linton authored
The SMCCC, part 3 indicates that only the bottom 32-bits of a 32-bit SMC call are valid. The upper bits must be zero. Lets enforce that so standard service code can assume its been called that way. Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Change-Id: I1bac50fbdc3b6ddca5fe2d1d1f96166a65ac4eb4
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Flora Fu authored
Add APU iommap settings for reviser, apu_ao and devapc control wrapper. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: Ie8e6a197c0f440f9e4ee8101202283a2dbf501a6
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Flora Fu authored
Setup APU_S_S_4/APU_S_S_5 permission as SEC_RW_ONLY. Signed-off-by: Flora Fu <flora.fu@mediatek.com> Change-Id: I6c50b2913bf34270a1b0ffaf0e0c435fee192a4c
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- 24 May, 2021 1 commit
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Mark Dykes authored
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- 20 May, 2021 1 commit
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Mark Dykes authored
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- 19 May, 2021 1 commit
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Manish V Badarkhe authored
Added support for HW computed CRC using Arm ACLE intrinsics. These are built-in intrinsics available for ARMv8.1-A, and onwards. These intrinsics are enabled via '-march=armv8-a+crc' compile switch for ARMv8-A (supports CRC instructions optionally). HW CRC support is enabled unconditionally in BL2 for all Arm platforms. HW CRC calculation is verified offline to ensure a similar result as its respective ZLib utility function. HW CRC calculation support will be used in the upcoming firmware update patches. Change-Id: Ia2ae801f62d2003e89a9c3e6d77469b5312614b3 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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- 17 May, 2021 4 commits
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Zelalem authored
Disable non-invasive debug of secure state for Juno in release builds. This makes sure that PMU counts only Non-secure events. Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I0d1c3f96f3b4e48360a7211ae55851d65d291025
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Madhukar Pappireddy authored
* changes: docs(prerequisites): add `--no-save` to `npm install` fix(hooks): downgrade `package-lock.json` version
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Chris Kay authored
To avoid the mistake fixed by the previous commit, ensure users install the Node.js dependencies without polluting the lock file by passing `--no-save` to the `npm install` line. Change-Id: I10b5cc17b9001fc2e26deee02bf99ce033a949c1 Signed-off-by: Chris Kay <chris.kay@arm.com>
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Chris Kay authored
The NPM lock file was accidentally updated using a later version of Node.js than required by the prerequisites. This upgraded the lock file to the v2 format, which causes a warning on Node.js 14 (the prerequisites version). This moves the lock file back to v1 by installing the dependencies with Node.js 14. Change-Id: I382d599fd2b67b07eb9234d14e7b631db6b11453 Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 14 May, 2021 3 commits
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Madhukar Pappireddy authored
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bipin.ravi authored
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Olivier Deprez authored
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- 13 May, 2021 3 commits
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Joanna Farley authored
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Madhukar Pappireddy authored
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Zelalem authored
Clean up instructions for building/running TF-A on the Juno platform and add correct link to SCP binaries. Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I536f98082e167edbf45f29ca23cc0db44687bb3b
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- 12 May, 2021 3 commits
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Madhukar Pappireddy authored
Updated the minor version in the makefile Change-Id: Ie2b3ce5b36a105a0e2fff52c3740cc9702ca3108 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Chris Kay authored
An indirect dependency of Commitizen (`merge`) is currently failing the NPM.js auditor due to vulnerability CVE-2020-28499. This commit moves the minimum version of Commitizen to 4.2.4, which has resolved this vulnerability. Change-Id: Ia9455bdbe02f7406c1a106f173c4095943a201ed Signed-off-by: Chris Kay <chris.kay@arm.com>
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Olivier Deprez authored
General refresh of the SPM document. Change-Id: I2f8e37c3f34bc8511b115f00b9a53b6a6ff41bea Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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- 07 May, 2021 2 commits
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Madhukar Pappireddy authored
Change log for trusted-firmware-a v2.5 release Change-Id: I6ffc8a40d2cc3a18145b87f895acdc1400db485a Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Mark Dykes authored
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- 05 May, 2021 3 commits
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Mark Dykes authored
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laurenw-arm authored
Removing the "Upcoming" change log due to the change in change log processing. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I6d2cc095dca3e654bd7e6fec2077c58bfbc48bb5
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Andre Przywara authored
In the comment in the ARM FPGA DT we promise a generous 100 MB initrd, but actually describe only a size of 20 MB. As initrds are the most common and easy userland option for the boards, let's increase the maximum size to the advertised 100 MB, to avoid unpacking errors when an initrd exceeds the current limit of 20 MB. Change-Id: If08ba3fabdad27b2c2aff93b18c3f664728b4348 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 04 May, 2021 1 commit
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Mark Dykes authored
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