- 13 May, 2021 2 commits
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Joanna Farley authored
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Madhukar Pappireddy authored
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- 12 May, 2021 1 commit
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Chris Kay authored
An indirect dependency of Commitizen (`merge`) is currently failing the NPM.js auditor due to vulnerability CVE-2020-28499. This commit moves the minimum version of Commitizen to 4.2.4, which has resolved this vulnerability. Change-Id: Ia9455bdbe02f7406c1a106f173c4095943a201ed Signed-off-by: Chris Kay <chris.kay@arm.com>
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- 07 May, 2021 2 commits
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Madhukar Pappireddy authored
Change log for trusted-firmware-a v2.5 release Change-Id: I6ffc8a40d2cc3a18145b87f895acdc1400db485a Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Mark Dykes authored
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- 05 May, 2021 3 commits
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Mark Dykes authored
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laurenw-arm authored
Removing the "Upcoming" change log due to the change in change log processing. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I6d2cc095dca3e654bd7e6fec2077c58bfbc48bb5
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Andre Przywara authored
In the comment in the ARM FPGA DT we promise a generous 100 MB initrd, but actually describe only a size of 20 MB. As initrds are the most common and easy userland option for the boards, let's increase the maximum size to the advertised 100 MB, to avoid unpacking errors when an initrd exceeds the current limit of 20 MB. Change-Id: If08ba3fabdad27b2c2aff93b18c3f664728b4348 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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- 04 May, 2021 2 commits
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Mark Dykes authored
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laurenw-arm authored
Reverting FVP versions to previous version 11.12.38 for Cortex-A32x4 and Neoverse-N2x4. Change-Id: I81e8ad24794dd425a9e9a66dc8bb02b42191abf1 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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- 30 Apr, 2021 14 commits
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Lauren Wehrmeister authored
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bipin.ravi authored
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Zelalem authored
This is the first release of the public Trusted Firmware A class threat model. This release provides the baseline for future updates to be applied as required by developments to the TF-A code base. Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I3c9aadc46196837679f0b1377bec9ed4fc42ff11
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laurenw-arm authored
Updated the list of supported FVP platforms as per the latest FVP release. Change-Id: I1abd0a7885b1133715062ee1b176733556a4820e Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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Manish Pandey authored
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Manish Pandey authored
* changes: plat: imx8mp: change the bl31 physical load address plat: imx8m: Fix the macro define error
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Jacky Bai authored
on i.MX8MP A1 silicon, the OCRAM space is extended to 512K + 64K, currently, OCRAM @0x960000-0x980000 is reserved for BL31, it will leave the last 64KB in non-continuous space. To provide a continuous 384KB + 64KB space for generic use, so move the BL31 space to 0x970000-0x990000 range. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I96d572fc0f87f05a60f55e0552a68b6e70f8e7f4
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Jacky Bai authored
the 'always_on' member should be initialized from 'on'. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I5746ff40075b4fcda2ac7d04a8d7f1269af17e91
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Manish Pandey authored
* changes: plat: ti: k3: board: Let explicitly map our SEC_SRAM_BASE to 0x0 plat: ti: k3: board: Lets cast our macros plat: ti: k3: common: bl31_setup: Use BL31_SIZE instead of computing plat: ti: k3: platform_def.h: Define the correct number of max table entries plat: ti: k3: board: lite: Increase SRAM size to account for additional table
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Olivier Deprez authored
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Usama Arif authored
This allows the the Matterhorn ELP Arm core to operate at its designated OPP. Signed-off-by: Usama Arif <usama.arif@arm.com> Change-Id: I7ccef0cfd079d630c3cfe7874590bf42789a1dca
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Olivier Deprez authored
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Olivier Deprez authored
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Olivier Deprez authored
PSA wording is not longer associated with FF-A. Change-Id: Id7c53b9c6c8f383543f6a32a15eb15b7749d8658 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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- 29 Apr, 2021 5 commits
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Yann Gautier authored
To compare the "okay" string of a property, strncmp is used but with the length given by fdt_getprop. This len value is reported as tainted by Coverity [1]. We just can use strlen("okay") which is a known value to compare the 2 strings. [1] https://scan4.coverity.com/reports.htm#v51972/p11439/fileInstanceId=96515154&defectInstanceId=14219121&mergedDefectId=342997 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ic8fb6ccf3126a37df615e433eb028861812015da
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Olivier Deprez authored
* changes: docs: add build options for GPT support enablement feat(plat/arm): add GPT parser support
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Manish Pandey authored
* changes: stm32mp1: enable PIE for BL32 stm32mp1: set BL sizes regardless of flags Add PIE support for AARCH32 Avoid the use of linker *_SIZE__ macros
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Manish V Badarkhe authored
Documented the build options used in Arm GPT parser enablement. Change-Id: I9d7ef2f44b8f9d2731dd17c2639e5ed0eb6d0b3a Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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Manish V Badarkhe authored
Added GPT parser support in BL2 for Arm platforms to get the entry address and length of the FIP in the GPT image. Also, increased BL2 maximum size for FVP platform to successfully compile ROM-enabled build with this change. Verified this change using a patch: https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/9654 Change-Id: Ie8026db054966653b739a82d9ba106d283f534d0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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- 28 Apr, 2021 11 commits
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Mark Dykes authored
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Mark Dykes authored
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Mark Dykes authored
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Mark Dykes authored
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Madhukar Pappireddy authored
* changes: docs: update release information for v2.6 docs: update code freeze & target date for v2.5
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Madhukar Pappireddy authored
Updated tentative code freeze and release target date for v2.6 release. Change-Id: I3dd6cfef1a07f3e0159ec7996d18f6cbcb975da7 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Madhukar Pappireddy authored
Updated code freeze and release target date for v2.5 release. Change-Id: I72850eed2aa77d3adecaf71d74e9ecebcc36d5b4 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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Olivier Deprez authored
* changes: fix(dt-bindings): fix static checks docs(license): rectify `arm-gic.h` license
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David Horstmann authored
NOTE: Breaking change to the way UUIDs are stored in the DT Currently, UUIDs are stored in the device tree as sequences of 4 integers. There is a mismatch in endianness between the way UUIDs are represented in memory and the way they are parsed from the device tree. As a result, we must either store the UUIDs in little-endian format in the DT (which means that they do not match up with their string representations) or perform endianness conversion after parsing them. Currently, TF-A chooses the second option, with unwieldy endianness-conversion taking place after reading a UUID. To fix this problem, and to make it convenient to copy and paste UUIDs from other tools, change to store UUIDs in string format, using a new wrapper function to parse them from the device tree. Change-Id: I38bd63c907be14e412f03ef0aab9dcabfba0eaa0 Signed-off-by: David Horstmann <david.horstmann@arm.com>
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David Horstmann authored
TF-A does not have the capability to read UUIDs in string form from the device tree. This capability is useful for readability, so add a wrapper function, fdtw_read_uuid() to parse UUIDs from the DT. This function should parse a string of the form: "aabbccdd-eeff-4099-8877-665544332211" to the byte sequence in memory: [aa bb cc dd ee ff 40 99 88 77 66 55 44 33 22 11] Change-Id: I99a92fbeb40f4f4713f3458b36cb3863354d2bdf Signed-off-by: David Horstmann <david.horstmann@arm.com>
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Manish V Badarkhe authored
Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IMAGE_MAX_SIZE so that these macros can be reused in the subsequent GPT based support changes. Change-Id: I88fdbd53e1966578af4f1e8e9d5fef42c27b1173 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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