Commits · 98ee29c6c484d810a9fc1e33276c26d6a0e85e04 · adam.huang / Arm Trusted Firmware

17 Dec, 2019 1 commit

intel: Create SiP service header file · d25041bf

Hadi Asyrafi authored Oct 22, 2019



Separate SiP related definition from mailbox header file
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I45ba540f29d9261007f7ec23469358747cf140b4

d25041bf

28 Nov, 2019 2 commits

intel: Refactor common platform code [4/5] · c76d4239

Hadi Asyrafi authored Oct 23, 2019



Pull out SiP & PSCI service driver into socfpga common directory.
Remove deassert_peripheral_reset from cold reset procedure as it is not
needed.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I1a0390fca6db4c89919a2a038de2a9d96c3ae4fd

c76d4239

intel: Refactor common platform code [3/5] · d09adcba

Hadi Asyrafi authored Oct 23, 2019



Pull out mailbox driver into common area as they can be shared between
intel's socfpga platform
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4064de1ec668931d77abcb7804f6952b70d33716

d09adcba

17 Jul, 2019 1 commit

intel: Adds support for Agilex platform · 2f11d548

Hadi Asyrafi authored Jun 27, 2019


Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef

2f11d548

26 Feb, 2019 1 commit

plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform · 1cf55aba

Tien Hock, Loh authored Feb 26, 2019



This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox calls for FPGA reconfiguration
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

1cf55aba