- 16 Jul, 2018 7 commits
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Antonio Nino Diaz authored
The Non-secure DRAM region shouldn't be protected in the range specified in the Linux command line with memmap. This change also increases the size of the Secure DRAM region. Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This option allows the Trusted Firmware to pass the correct arguments to a 32 or 64-bit Linux kernel without the need of an intermediate loader such as U-Boot. Change-Id: I2b22e8933fad6a614588ace559f893e97329801f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
FIQs shouldn't be used at all as long as the interrupt routing doesn't support them properly. Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Remove unused variable and set the secure entrypoint correctly. Change-Id: I7447ea62771092de6be35704077ae28c519d6993 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of entropy and does xor on them). It is disabled by default. Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
Note that this is a non-secure RNG. This is only useful for educational purposes. Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
There is no way to boot BL31 at the addresses specified in the platform memory map unless an extra loader is used at address 0x00000000. It is better to remove it to prevent confusion. Having it enabled was a bug. Change-Id: I3229fbc080f5996cff47efce8e799bae94e0d5cb Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 14 Jul, 2018 2 commits
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Antonio Nino Diaz authored
Implement VideoCore mailbox interface driver and use it to get the board revision identifier. For now it is only used to print the model for debug purposes. This wiki contains the documentation of the mailbox interface: https://github.com/raspberrypi/firmware/wiki Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Antonio Nino Diaz authored
This implementation doesn't actually turn the system off, it simply reboots it and prevents it from booting while keeping it in a low power mode. Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 13 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Add a new default makefile target to concatenate BL1 and the FIP and generate armstub8.bin. This way it isn't needed to do it manually. Documentation updated to reflect the changes. Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 12 Jul, 2018 1 commit
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Ying-Chun Liu (PaulLiu) authored
Running optee_test failed because SEC_DRAM0_SIZE is too small. Previous is 2 MB. We enlarge it to 11 MB for passing the test. Also we reduce the NS_DRAM0_SIZE from 13MB to 4MB so that the whole section is still fit in 16MB. This commit also modified the document to reflect the changes we've made in code. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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- 11 Jul, 2018 1 commit
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Antonio Nino Diaz authored
Implement minimal interrupt routing functions. All interrupts are treated as non-secure interrupts to be handled by the non-secure world. Add note to the documentation about disabling FIQs qhen using OP-TEE with Linux. Change-Id: I937096542d973925e43ae946c5d0b306d0d95a94 Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 05 Jul, 2018 1 commit
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Ying-Chun Liu (PaulLiu) authored
This patch adds support for TBB to rpi3. The ROTPK is generated at build time and is included into BL1/BL2. The key and content certificates are read over semihosting. Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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- 19 Jun, 2018 1 commit
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Ying-Chun Liu (PaulLiu) authored
Support for loading optee images as BL32 secure payload. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
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- 27 Mar, 2018 1 commit
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Antonio Nino Diaz authored
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. The crash console doesn't use this API, it uses internally the core functions of the 16550 console. `bl31_plat_runtime_setup` is no longer needed. When this platform port was introduced, that function used to disable the console. It was needed to override that behaviour. The new behaviour is to switch to the runtime console. The console is registered for all scopes (boot, crash and runtime) in `rpi3_console_init` so it is not needed to override the default behaviour anymore. Update documentation. Change-Id: If2ee8f91044216183b7ef142e5c05ad6220ae92f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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- 26 Mar, 2018 1 commit
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Jonathan Wright authored
Ensure (where possible) that switch statements in plat comply with MISRA rules 16.1 - 16.7. Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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- 29 Jan, 2018 1 commit
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Dimitris Papastamos authored
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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- 01 Dec, 2017 1 commit
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Antonio Nino Diaz authored
This port can be compiled to boot an AArch64 or AArch32 payload with the build option `RPI3_BL33_AARCH32`. Note: This is not a secure port of the Trusted Firmware. This port is only meant to be a reference implementation to experiment with an inexpensive board in real hardware. Change-Id: Ide58114299289bf765ef1366199eb05c46f81903 Co-authored-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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